| Message ID | 1683914423-17612-3-git-send-email-quic_khsieh@quicinc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | add DSC 1.2 dpu supports | expand |
On 12/05/2023 21:00, Kuogee Hsieh wrote: > DPU < 7.0.0 requires the PINGPONG block to be involved during > DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC > encoder engine was moved to INTF with the help of the flush mechanism. > Add a DPU_PINGPONG_DSC feature bit to restrict the availability of > dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the > PINGPONG block to DPU < 7.0.0 hardware, as the registers are not > available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. > Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, PINGPONG_SDM845_TE2_MASK > and PINGPONG_SM8150_MASK which is used for all DPU < 7.0 chipsets. > > changes in v6: > -- split patches and rearrange to keep catalog related files at this patch > > changes in v7: > -- rewording commit text as suggested at review comments > > Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Single nit below > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++- > 2 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index 82b58c6..78e4bf6 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -76,13 +76,13 @@ > (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) > > #define PINGPONG_SDM845_MASK \ > - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC)) > > #define PINGPONG_SDM845_TE2_MASK \ > - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) > + (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | BIT(DPU_PINGPONG_DSC)) > > #define PINGPONG_SM8150_MASK \ > - (BIT(DPU_PINGPONG_DITHER)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) > > #define CTL_SC7280_MASK \ > (BIT(DPU_CTL_ACTIVE_CFG) | \ > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > index 6ee48f0..dc0a4da 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > @@ -144,7 +144,8 @@ enum { > * @DPU_PINGPONG_TE2 Additional tear check block for split pipes > * @DPU_PINGPONG_SPLIT PP block supports split fifo > * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo > - * @DPU_PINGPONG_DITHER, Dither blocks > + * @DPU_PINGPONG_DITHER Dither blocks Ideally this should be a separate commit. It is irrelevant to DPU_PINGPONG_DSC > + * @DPU_PINGPONG_DSC PP ops functions required for DSC > * @DPU_PINGPONG_MAX > */ > enum { > @@ -153,6 +154,7 @@ enum { > DPU_PINGPONG_SPLIT, > DPU_PINGPONG_SLAVE, > DPU_PINGPONG_DITHER, > + DPU_PINGPONG_DSC, > DPU_PINGPONG_MAX > }; >
On 2023-05-12 11:00:17, Kuogee Hsieh wrote: > > DPU < 7.0.0 requires the PINGPONG block to be involved during > DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC > encoder engine was moved to INTF with the help of the flush mechanism. > Add a DPU_PINGPONG_DSC feature bit to restrict the availability of > dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the > PINGPONG block to DPU < 7.0.0 hardware, as the registers are not > available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. Fwiw I added the brackets in the suggestion as an "up to you to include this or not". Drop the brackets if you think this should be part of the sentence. > Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, PINGPONG_SDM845_TE2_MASK > and PINGPONG_SM8150_MASK which is used for all DPU < 7.0 chipsets. > > changes in v6: > -- split patches and rearrange to keep catalog related files at this patch > > changes in v7: > -- rewording commit text as suggested at review comments > > Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++- > 2 files changed, 6 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > index 82b58c6..78e4bf6 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c > @@ -76,13 +76,13 @@ > (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) > > #define PINGPONG_SDM845_MASK \ > - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC)) > > #define PINGPONG_SDM845_TE2_MASK \ > - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) > + (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | BIT(DPU_PINGPONG_DSC)) Don't add it here, this is already in PINGPONG_SDM845_MASK. > > #define PINGPONG_SM8150_MASK \ > - (BIT(DPU_PINGPONG_DITHER)) > + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) > > #define CTL_SC7280_MASK \ > (BIT(DPU_CTL_ACTIVE_CFG) | \ > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > index 6ee48f0..dc0a4da 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h > @@ -144,7 +144,8 @@ enum { > * @DPU_PINGPONG_TE2 Additional tear check block for split pipes > * @DPU_PINGPONG_SPLIT PP block supports split fifo > * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo > - * @DPU_PINGPONG_DITHER, Dither blocks > + * @DPU_PINGPONG_DITHER Dither blocks > + * @DPU_PINGPONG_DSC PP ops functions required for DSC Following the other documentation wording: PP block supports DSC Or: PP block has DSC enable/disable registers - Marijn > * @DPU_PINGPONG_MAX > */ > enum { > @@ -153,6 +154,7 @@ enum { > DPU_PINGPONG_SPLIT, > DPU_PINGPONG_SLAVE, > DPU_PINGPONG_DITHER, > + DPU_PINGPONG_DSC, > DPU_PINGPONG_MAX > }; > > -- > 2.7.4 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 82b58c6..78e4bf6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -76,13 +76,13 @@ (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) #define PINGPONG_SDM845_MASK \ - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE)) + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_TE) | BIT(DPU_PINGPONG_DSC)) #define PINGPONG_SDM845_TE2_MASK \ - (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2)) + (PINGPONG_SDM845_MASK | BIT(DPU_PINGPONG_TE2) | BIT(DPU_PINGPONG_DSC)) #define PINGPONG_SM8150_MASK \ - (BIT(DPU_PINGPONG_DITHER)) + (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) #define CTL_SC7280_MASK \ (BIT(DPU_CTL_ACTIVE_CFG) | \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index 6ee48f0..dc0a4da 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -144,7 +144,8 @@ enum { * @DPU_PINGPONG_TE2 Additional tear check block for split pipes * @DPU_PINGPONG_SPLIT PP block supports split fifo * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo - * @DPU_PINGPONG_DITHER, Dither blocks + * @DPU_PINGPONG_DITHER Dither blocks + * @DPU_PINGPONG_DSC PP ops functions required for DSC * @DPU_PINGPONG_MAX */ enum { @@ -153,6 +154,7 @@ enum { DPU_PINGPONG_SPLIT, DPU_PINGPONG_SLAVE, DPU_PINGPONG_DITHER, + DPU_PINGPONG_DSC, DPU_PINGPONG_MAX };
DPU < 7.0.0 requires the PINGPONG block to be involved during DSC setting up. Since DPU >= 7.0.0, enabling and starting the DSC encoder engine was moved to INTF with the help of the flush mechanism. Add a DPU_PINGPONG_DSC feature bit to restrict the availability of dpu_hw_pp_setup_dsc() and dpu_hw_pp_dsc_{enable,disable}() on the PINGPONG block to DPU < 7.0.0 hardware, as the registers are not available [in the PINGPONG block] on DPU 7.0.0 and higher anymore. Add DPU_PINGPONG_DSC to PINGPONG_SDM845_MASK, PINGPONG_SDM845_TE2_MASK and PINGPONG_SM8150_MASK which is used for all DPU < 7.0 chipsets. changes in v6: -- split patches and rearrange to keep catalog related files at this patch changes in v7: -- rewording commit text as suggested at review comments Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 4 +++- 2 files changed, 6 insertions(+), 4 deletions(-)