From patchwork Wed May 15 07:12:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dan Carpenter X-Patchwork-Id: 2570201 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by patchwork2.kernel.org (Postfix) with ESMTP id B3705DF2A2 for ; Wed, 15 May 2013 07:12:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A4A8AE6211 for ; Wed, 15 May 2013 00:12:47 -0700 (PDT) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from aserp1050.oracle.com (aserp1050.oracle.com [141.146.126.70]) by gabe.freedesktop.org (Postfix) with ESMTP id CC1E4E5EFE for ; Wed, 15 May 2013 00:12:31 -0700 (PDT) Received: from aserp1040.oracle.com (aserp1040.oracle.com [141.146.126.69]) by aserp1050.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id r4F7CUsM011079 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 15 May 2013 07:12:31 GMT Received: from acsinet21.oracle.com (acsinet21.oracle.com [141.146.126.237]) by aserp1040.oracle.com (Sentrion-MTA-4.3.1/Sentrion-MTA-4.3.1) with ESMTP id r4F7CRxo027313 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK); Wed, 15 May 2013 07:12:28 GMT Received: from userz7021.oracle.com (userz7021.oracle.com [156.151.31.85]) by acsinet21.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id r4F7CPJV005298 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=FAIL); Wed, 15 May 2013 07:12:26 GMT Received: from abhmt107.oracle.com (abhmt107.oracle.com [141.146.116.59]) by userz7021.oracle.com (8.14.4+Sun/8.14.4) with ESMTP id r4F7CP7d004752; Wed, 15 May 2013 07:12:25 GMT Received: from elgon.mountain (/197.237.137.111) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 15 May 2013 00:12:24 -0700 Date: Wed, 15 May 2013 10:12:25 +0300 From: Dan Carpenter To: David Airlie Subject: [patch] drm/nvc0-/gr: bug widening a binary "not" operation Message-ID: <20130515071225.GC20381@elgon.mountain> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.21 (2010-09-15) X-Source-IP: aserp1040.oracle.com [141.146.126.69] Cc: kernel-janitors@vger.kernel.org, Ben Skeggs , dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org Errors-To: dri-devel-bounces+patchwork-dri-devel=patchwork.kernel.org@lists.freedesktop.org "align" is u32 but info->addr and info->buffer[info->buffer_nr] are u64. The "&= ~(align - 1)" operation clears the high bits accidentally. I have fixed this by using the ALIGN() macro. Signed-off-by: Dan Carpenter diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c index 4cc6269..44b620b 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c @@ -117,9 +117,7 @@ nvc0_grctx_init(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) void nvc0_grctx_data(struct nvc0_grctx *info, u32 size, u32 align, u32 access) { - info->buffer[info->buffer_nr] = info->addr; - info->buffer[info->buffer_nr] += (align - 1); - info->buffer[info->buffer_nr] &= ~(align - 1); + info->buffer[info->buffer_nr] = ALIGN(info->addr, align); info->addr = info->buffer[info->buffer_nr++] + size; info->data->size = size;