From patchwork Sun Jan 19 18:58:40 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Francois Moine X-Patchwork-Id: 3509761 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DB8F39F2E9 for ; Sun, 19 Jan 2014 19:00:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id DE23920122 for ; Sun, 19 Jan 2014 19:00:53 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id EA7502010E for ; Sun, 19 Jan 2014 19:00:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B8DC6FA68F; Sun, 19 Jan 2014 11:00:50 -0800 (PST) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from smtp2-g21.free.fr (smtp2-g21.free.fr [212.27.42.2]) by gabe.freedesktop.org (Postfix) with ESMTP id 88871FA691 for ; Sun, 19 Jan 2014 11:00:46 -0800 (PST) Received: from armhf (unknown [IPv6:2a01:e35:2f5c:9de0:212:bfff:fe1e:9ce4]) by smtp2-g21.free.fr (Postfix) with ESMTP id CDC124B013B; Sun, 19 Jan 2014 20:00:34 +0100 (CET) Date: Sun, 19 Jan 2014 19:58:40 +0100 From: Jean-Francois Moine To: dri-devel@lists.freedesktop.org Subject: [PATCH v3 07/24] drm/i2c: tda998x: set the video mode from the adjusted value Message-ID: <20140119195840.1ecab03b@armhf> In-Reply-To: References: X-Mailer: Claws Mail 3.9.3 (GTK+ 2.24.22; arm-unknown-linux-gnueabihf) MIME-Version: 1.0 Cc: Russell King - ARM Linux , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_MED, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch uses always the adjusted video mode instead of a mix of original and adjusted mode. Signed-off-by: Jean-Francois Moine Acked-by: Russell King Tested-by: Russell King --- drivers/gpu/drm/i2c/tda998x_drv.c | 66 +++++++++++++++++++-------------------- 1 file changed, 33 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/i2c/tda998x_drv.c b/drivers/gpu/drm/i2c/tda998x_drv.c index b688801..5d82301 100644 --- a/drivers/gpu/drm/i2c/tda998x_drv.c +++ b/drivers/gpu/drm/i2c/tda998x_drv.c @@ -773,7 +773,7 @@ tda998x_encoder_mode_valid(struct drm_encoder *encoder, static void tda998x_encoder_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, - struct drm_display_mode *adjusted_mode) + struct drm_display_mode *adj_mode) { struct tda998x_priv *priv = to_tda998x_priv(encoder); uint16_t ref_pix, ref_line, n_pix, n_line; @@ -802,13 +802,13 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, * So we add +1 to all horizontal and vertical register values, * plus an additional +3 for REFPIX as we are using RGB input only. */ - n_pix = mode->htotal; - n_line = mode->vtotal; + n_pix = adj_mode->htotal; + n_line = adj_mode->vtotal; - hs_pix_e = mode->hsync_end - mode->hdisplay; - hs_pix_s = mode->hsync_start - mode->hdisplay; - de_pix_e = mode->htotal; - de_pix_s = mode->htotal - mode->hdisplay; + hs_pix_e = adj_mode->hsync_end - adj_mode->hdisplay; + hs_pix_s = adj_mode->hsync_start - adj_mode->hdisplay; + de_pix_e = adj_mode->htotal; + de_pix_s = adj_mode->htotal - adj_mode->hdisplay; ref_pix = 3 + hs_pix_s; /* @@ -816,37 +816,38 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, * those to adjust the position of the rising VS edge by adding * HSKEW to ref_pix. */ - if (adjusted_mode->flags & DRM_MODE_FLAG_HSKEW) - ref_pix += adjusted_mode->hskew; + if (adj_mode->flags & DRM_MODE_FLAG_HSKEW) + ref_pix += adj_mode->hskew; - if ((mode->flags & DRM_MODE_FLAG_INTERLACE) == 0) { - ref_line = 1 + mode->vsync_start - mode->vdisplay; - vwin1_line_s = mode->vtotal - mode->vdisplay - 1; - vwin1_line_e = vwin1_line_s + mode->vdisplay; + if ((adj_mode->flags & DRM_MODE_FLAG_INTERLACE) == 0) { + ref_line = 1 + adj_mode->vsync_start - adj_mode->vdisplay; + vwin1_line_s = adj_mode->vtotal - adj_mode->vdisplay - 1; + vwin1_line_e = vwin1_line_s + adj_mode->vdisplay; vs1_pix_s = vs1_pix_e = hs_pix_s; - vs1_line_s = mode->vsync_start - mode->vdisplay; + vs1_line_s = adj_mode->vsync_start - adj_mode->vdisplay; vs1_line_e = vs1_line_s + - mode->vsync_end - mode->vsync_start; + adj_mode->vsync_end - adj_mode->vsync_start; vwin2_line_s = vwin2_line_e = 0; vs2_pix_s = vs2_pix_e = 0; vs2_line_s = vs2_line_e = 0; } else { - ref_line = 1 + (mode->vsync_start - mode->vdisplay)/2; - vwin1_line_s = (mode->vtotal - mode->vdisplay)/2; - vwin1_line_e = vwin1_line_s + mode->vdisplay/2; + ref_line = 1 + (adj_mode->vsync_start - + adj_mode->vdisplay)/2; + vwin1_line_s = (adj_mode->vtotal - adj_mode->vdisplay)/2; + vwin1_line_e = vwin1_line_s + adj_mode->vdisplay/2; vs1_pix_s = vs1_pix_e = hs_pix_s; - vs1_line_s = (mode->vsync_start - mode->vdisplay)/2; + vs1_line_s = (adj_mode->vsync_start - adj_mode->vdisplay)/2; vs1_line_e = vs1_line_s + - (mode->vsync_end - mode->vsync_start)/2; - vwin2_line_s = vwin1_line_s + mode->vtotal/2; - vwin2_line_e = vwin2_line_s + mode->vdisplay/2; - vs2_pix_s = vs2_pix_e = hs_pix_s + mode->htotal/2; - vs2_line_s = vs1_line_s + mode->vtotal/2 ; + (adj_mode->vsync_end - adj_mode->vsync_start)/2; + vwin2_line_s = vwin1_line_s + adj_mode->vtotal/2; + vwin2_line_e = vwin2_line_s + adj_mode->vdisplay/2; + vs2_pix_s = vs2_pix_e = hs_pix_s + adj_mode->htotal/2; + vs2_line_s = vs1_line_s + adj_mode->vtotal/2 ; vs2_line_e = vs2_line_s + - (mode->vsync_end - mode->vsync_start)/2; + (adj_mode->vsync_end - adj_mode->vsync_start)/2; } - div = 148500 / mode->clock; + div = 148500 / adj_mode->clock; /* mute the audio FIFO: */ reg_set(priv, REG_AIP_CNTRL_0, AIP_CNTRL_0_RST_FIFO); @@ -896,9 +897,9 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, * TDA19988 requires high-active sync at input stage, * so invert low-active sync provided by master encoder here */ - if (mode->flags & DRM_MODE_FLAG_NHSYNC) + if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC) reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_H_TGL); - if (mode->flags & DRM_MODE_FLAG_NVSYNC) + if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC) reg_set(priv, REG_VIP_CNTRL_3, VIP_CNTRL_3_V_TGL); /* @@ -906,9 +907,9 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, * revert input stage toggled sync at output stage */ reg = TBG_CNTRL_1_TGL_EN; - if (mode->flags & DRM_MODE_FLAG_NHSYNC) + if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC) reg |= TBG_CNTRL_1_H_TGL; - if (mode->flags & DRM_MODE_FLAG_NVSYNC) + if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC) reg |= TBG_CNTRL_1_V_TGL; reg_write(priv, REG_TBG_CNTRL_1, reg); @@ -949,11 +950,10 @@ tda998x_encoder_mode_set(struct drm_encoder *encoder, reg_write(priv, REG_ENC_CNTRL, ENC_CNTRL_CTL_CODE(1)); reg_set(priv, REG_TX33, TX33_HDMI); - tda998x_write_avi(priv, adjusted_mode); + tda998x_write_avi(priv, adj_mode); if (priv->params.audio_cfg) - tda998x_configure_audio(priv, adjusted_mode, - &priv->params); + tda998x_configure_audio(priv, adj_mode, &priv->params); } }