diff mbox

drm/radeon: TTM must be init with cpu-visible VRAM, v2

Message ID 20140228205023.9677a7f9.cand@gmx.com (mailing list archive)
State New, archived
Headers show

Commit Message

Lauri Kasanen Feb. 28, 2014, 6:50 p.m. UTC
Without this, a bo may get created in the cpu-inaccessible vram.
Before the CP engines get setup, all copies are done via cpu memcpy.

This means that the cpu tries to read from inaccessible memory, fails,
and the radeon module proceeds to disable acceleration.

Doing this has no downsides, as the real VRAM size gets set as soon as the
CP engines get init.

This is a candidate for 3.14 fixes.

v2: Add comment on why the function is used

Signed-off-by: Lauri Kasanen <cand@gmx.com>
---
 drivers/gpu/drm/radeon/radeon_ttm.c | 3 +++
 1 file changed, 3 insertions(+)

Comments

Alex Deucher Feb. 28, 2014, 7:20 p.m. UTC | #1
On Fri, Feb 28, 2014 at 1:50 PM, Lauri Kasanen <cand@gmx.com> wrote:
> Without this, a bo may get created in the cpu-inaccessible vram.
> Before the CP engines get setup, all copies are done via cpu memcpy.
>
> This means that the cpu tries to read from inaccessible memory, fails,
> and the radeon module proceeds to disable acceleration.
>
> Doing this has no downsides, as the real VRAM size gets set as soon as the
> CP engines get init.
>
> This is a candidate for 3.14 fixes.
>
> v2: Add comment on why the function is used
>
> Signed-off-by: Lauri Kasanen <cand@gmx.com>

Applied to my fixes tree.  thanks!

Alex

> ---
>  drivers/gpu/drm/radeon/radeon_ttm.c | 3 +++
>  1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
> index 3aa853c..b966f85 100644
> --- a/drivers/gpu/drm/radeon/radeon_ttm.c
> +++ b/drivers/gpu/drm/radeon/radeon_ttm.c
> @@ -715,6 +715,9 @@ int radeon_ttm_init(struct radeon_device *rdev)
>                 DRM_ERROR("Failed initializing VRAM heap.\n");
>                 return r;
>         }
> +       /* Change the size here instead of the init above so only lpfn is affected */
> +       radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
> +
>         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
>                              RADEON_GEM_DOMAIN_VRAM,
>                              NULL, &rdev->stollen_vga_memory);
> --
> 1.8.3.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
Christian König Feb. 28, 2014, 7:56 p.m. UTC | #2
Am 28.02.2014 19:50, schrieb Lauri Kasanen:
> Without this, a bo may get created in the cpu-inaccessible vram.
> Before the CP engines get setup, all copies are done via cpu memcpy.
>
> This means that the cpu tries to read from inaccessible memory, fails,
> and the radeon module proceeds to disable acceleration.
>
> Doing this has no downsides, as the real VRAM size gets set as soon as the
> CP engines get init.
>
> This is a candidate for 3.14 fixes.
>
> v2: Add comment on why the function is used
>
> Signed-off-by: Lauri Kasanen <cand@gmx.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

And I suggest to add "Cc: stable@vger.kernel.org" as well.

Christian.

> ---
>   drivers/gpu/drm/radeon/radeon_ttm.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
> index 3aa853c..b966f85 100644
> --- a/drivers/gpu/drm/radeon/radeon_ttm.c
> +++ b/drivers/gpu/drm/radeon/radeon_ttm.c
> @@ -715,6 +715,9 @@ int radeon_ttm_init(struct radeon_device *rdev)
>   		DRM_ERROR("Failed initializing VRAM heap.\n");
>   		return r;
>   	}
> +	/* Change the size here instead of the init above so only lpfn is affected */
> +	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
> +
>   	r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
>   			     RADEON_GEM_DOMAIN_VRAM,
>   			     NULL, &rdev->stollen_vga_memory);
Dave Airlie Feb. 28, 2014, 8:47 p.m. UTC | #3
On Sat, Mar 1, 2014 at 5:56 AM, Christian König <deathsimple@vodafone.de> wrote:
> Am 28.02.2014 19:50, schrieb Lauri Kasanen:
>
>> Without this, a bo may get created in the cpu-inaccessible vram.
>> Before the CP engines get setup, all copies are done via cpu memcpy.
>>
>> This means that the cpu tries to read from inaccessible memory, fails,
>> and the radeon module proceeds to disable acceleration.
>>
>> Doing this has no downsides, as the real VRAM size gets set as soon as the
>> CP engines get init.
>>
>> This is a candidate for 3.14 fixes.
>>
>> v2: Add comment on why the function is used
>>
>> Signed-off-by: Lauri Kasanen <cand@gmx.com>
>
>
> Reviewed-by: Christian König <christian.koenig@amd.com>
>
> And I suggest to add "Cc: stable@vger.kernel.org" as well.
>
> Christian.

Won't this create objects that are stuck in the middle of VRAM with
the new top down approach?

then when we go to use all the VRAM they'll be pinned in the middle?

Dave.
Lauri Kasanen March 1, 2014, 9:15 a.m. UTC | #4
On Sat, 1 Mar 2014 06:47:41 +1000
Dave Airlie <airlied@gmail.com> wrote:

> On Sat, Mar 1, 2014 at 5:56 AM, Christian König <deathsimple@vodafone.de> wrote:
> > Am 28.02.2014 19:50, schrieb Lauri Kasanen:
> >
> >> Without this, a bo may get created in the cpu-inaccessible vram.
> >> Before the CP engines get setup, all copies are done via cpu memcpy.
> >>
> >> This means that the cpu tries to read from inaccessible memory, fails,
> >> and the radeon module proceeds to disable acceleration.
> >>
> >> Doing this has no downsides, as the real VRAM size gets set as soon as the
> >> CP engines get init.
> >>
> >> This is a candidate for 3.14 fixes.
> >>
> >> v2: Add comment on why the function is used
>
>> Reviewed-by: Christian König <christian.koenig@amd.com>
>>
>> And I suggest to add "Cc: stable@vger.kernel.org" as well.
>
> Won't this create objects that are stuck in the middle of VRAM with
> the new top down approach?
> 
> then when we go to use all the VRAM they'll be pinned in the middle?

Yes, the initial pins would act like that with the top-down code. But
the top-down logic is 3.15 material and still WIP.

Depending on their constraints, I think I'll either add a new flag, or
turn them into FIXED allocations - do they need to be at exact position
foo or only at the beginning. (Christian?)

So sending this fix to stable is safe, as they all use bottom-up.

- Lauri
Christian König March 1, 2014, 10:29 a.m. UTC | #5
Am 01.03.2014 10:15, schrieb Lauri Kasanen:
> On Sat, 1 Mar 2014 06:47:41 +1000
> Dave Airlie <airlied@gmail.com> wrote:
>
>> On Sat, Mar 1, 2014 at 5:56 AM, Christian König <deathsimple@vodafone.de> wrote:
>>> Am 28.02.2014 19:50, schrieb Lauri Kasanen:
>>>
>>>> Without this, a bo may get created in the cpu-inaccessible vram.
>>>> Before the CP engines get setup, all copies are done via cpu memcpy.
>>>>
>>>> This means that the cpu tries to read from inaccessible memory, fails,
>>>> and the radeon module proceeds to disable acceleration.
>>>>
>>>> Doing this has no downsides, as the real VRAM size gets set as soon as the
>>>> CP engines get init.
>>>>
>>>> This is a candidate for 3.14 fixes.
>>>>
>>>> v2: Add comment on why the function is used
>>> Reviewed-by: Christian König <christian.koenig@amd.com>
>>>
>>> And I suggest to add "Cc: stable@vger.kernel.org" as well.
>> Won't this create objects that are stuck in the middle of VRAM with
>> the new top down approach?
>>
>> then when we go to use all the VRAM they'll be pinned in the middle?
> Yes, the initial pins would act like that with the top-down code. But
> the top-down logic is 3.15 material and still WIP.
>
> Depending on their constraints, I think I'll either add a new flag, or
> turn them into FIXED allocations - do they need to be at exact position
> foo or only at the beginning. (Christian?)

AFAIK the stolen VGA memory must be at the very beginning.

The UVD firmware memory block needs to be in the first 256MB, allocated 
and initialized before all other blocks are started and after used once 
can't be moved around any more.

I'm not sure about this but we probably have more allocations that 
assume they end up at the beginning of the address space (GART?).

Christian.

>
> So sending this fix to stable is safe, as they all use bottom-up.
>
> - Lauri
Alex Deucher March 2, 2014, 5:05 p.m. UTC | #6
On Sat, Mar 1, 2014 at 5:29 AM, Christian König <deathsimple@vodafone.de> wrote:
> Am 01.03.2014 10:15, schrieb Lauri Kasanen:
>
>> On Sat, 1 Mar 2014 06:47:41 +1000
>> Dave Airlie <airlied@gmail.com> wrote:
>>
>>> On Sat, Mar 1, 2014 at 5:56 AM, Christian König <deathsimple@vodafone.de>
>>> wrote:
>>>>
>>>> Am 28.02.2014 19:50, schrieb Lauri Kasanen:
>>>>
>>>>> Without this, a bo may get created in the cpu-inaccessible vram.
>>>>> Before the CP engines get setup, all copies are done via cpu memcpy.
>>>>>
>>>>> This means that the cpu tries to read from inaccessible memory, fails,
>>>>> and the radeon module proceeds to disable acceleration.
>>>>>
>>>>> Doing this has no downsides, as the real VRAM size gets set as soon as
>>>>> the
>>>>> CP engines get init.
>>>>>
>>>>> This is a candidate for 3.14 fixes.
>>>>>
>>>>> v2: Add comment on why the function is used
>>>>
>>>> Reviewed-by: Christian König <christian.koenig@amd.com>
>>>>
>>>> And I suggest to add "Cc: stable@vger.kernel.org" as well.
>>>
>>> Won't this create objects that are stuck in the middle of VRAM with
>>> the new top down approach?
>>>
>>> then when we go to use all the VRAM they'll be pinned in the middle?
>>
>> Yes, the initial pins would act like that with the top-down code. But
>> the top-down logic is 3.15 material and still WIP.
>>
>> Depending on their constraints, I think I'll either add a new flag, or
>> turn them into FIXED allocations - do they need to be at exact position
>> foo or only at the beginning. (Christian?)
>
>
> AFAIK the stolen VGA memory must be at the very beginning.
>
> The UVD firmware memory block needs to be in the first 256MB, allocated and
> initialized before all other blocks are started and after used once can't be
> moved around any more.
>
> I'm not sure about this but we probably have more allocations that assume
> they end up at the beginning of the address space (GART?).
>

Gart (vmid 0) needs to be in the visible area since we use the CPU to update it.

Alex

> Christian.
>
>
>>
>> So sending this fix to stable is safe, as they all use bottom-up.
>>
>> - Lauri
>
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel
diff mbox

Patch

diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 3aa853c..b966f85 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -715,6 +715,9 @@  int radeon_ttm_init(struct radeon_device *rdev)
 		DRM_ERROR("Failed initializing VRAM heap.\n");
 		return r;
 	}
+	/* Change the size here instead of the init above so only lpfn is affected */
+	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
+
 	r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 			     RADEON_GEM_DOMAIN_VRAM,
 			     NULL, &rdev->stollen_vga_memory);