diff mbox

drm/amdkfd: uninitialized variable in dbgdev_wave_control_set_registers()

Message ID 20160311075151.GA7902@mwanda (mailing list archive)
State New, archived
Headers show

Commit Message

Dan Carpenter March 11, 2016, 7:51 a.m. UTC 
At the end of the function we expect "status" to be zero, but it's
either -EINVAL or unitialized.

Fixes: 788bf83db301 ('drm/amdkfd: Add wave control operation to debugger')
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>

Comments

Oded Gabbay March 14, 2016, 1:57 p.m. UTC | #1 
On Fri, Mar 11, 2016 at 9:51 AM, Dan Carpenter <dan.carpenter@oracle.com> wrote:
> At the end of the function we expect "status" to be zero, but it's
> either -EINVAL or unitialized.
>
> Fixes: 788bf83db301 ('drm/amdkfd: Add wave control operation to debugger')
> Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
> index c34c393..d5e19b5 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
> @@ -513,7 +513,7 @@ static int dbgdev_wave_control_set_registers(
>                                 union SQ_CMD_BITS *in_reg_sq_cmd,
>                                 union GRBM_GFX_INDEX_BITS *in_reg_gfx_index)
>  {
> -       int status;
> +       int status = 0;
>         union SQ_CMD_BITS reg_sq_cmd;
>         union GRBM_GFX_INDEX_BITS reg_gfx_index;
>         struct HsaDbgWaveMsgAMDGen2 *pMsg;

Thanks,
applied to my fixes tree.

Oded
diff mbox

Patch

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
index c34c393..d5e19b5 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_dbgdev.c
@@ -513,7 +513,7 @@  static int dbgdev_wave_control_set_registers(
 				union SQ_CMD_BITS *in_reg_sq_cmd,
 				union GRBM_GFX_INDEX_BITS *in_reg_gfx_index)
 {
-	int status;
+	int status = 0;
 	union SQ_CMD_BITS reg_sq_cmd;
 	union GRBM_GFX_INDEX_BITS reg_gfx_index;
 	struct HsaDbgWaveMsgAMDGen2 *pMsg;