From patchwork Sat Apr 2 11:32:30 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Parsons X-Patchwork-Id: 8731311 Return-Path: X-Original-To: patchwork-dri-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id DB4239F36E for ; Sat, 2 Apr 2016 11:32:52 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 089EA20328 for ; Sat, 2 Apr 2016 11:32:52 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) by mail.kernel.org (Postfix) with ESMTP id 18CD5201C7 for ; Sat, 2 Apr 2016 11:32:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65DA06E2F9; Sat, 2 Apr 2016 11:32:36 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from avasout06.plus.net (avasout06.plus.net [212.159.14.18]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4F3A46E2F9 for ; Sat, 2 Apr 2016 11:32:34 +0000 (UTC) Received: from paul ([91.125.121.107]) by avasout06 with smtp id dPYW1s0032K7nnf01PYXpu; Sat, 02 Apr 2016 12:32:31 +0100 X-CM-Score: 0.00 X-CNFS-Analysis: v=2.1 cv=Rr04V3SK c=1 sm=1 tr=0 a=F0+I8w5jghvP2JLf+wP3cA==:117 a=F0+I8w5jghvP2JLf+wP3cA==:17 a=L9H7d07YOLsA:10 a=9cW_t1CCXrUA:10 a=s5jvgZ67dGcA:10 a=CjxXgO3LAAAA:8 a=G2VVo2qcnvxmG8ESkLQA:9 Subject: [PATCH RFC] drm/radeon: Fix PCIe lane width calculation From: "Paul Parsons" To: Date: Sat, 02 Apr 2016 12:32:30 +0100 Mime-Version: 1.0 X-Mailer: Cleancode.email v3.1.3 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Message-Id: <20160402113236.65DA06E2F9@gabe.freedesktop.org> X-Spam-Status: No, score=-3.6 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, FORGED_YAHOO_RCVD,FREEMAIL_FROM,RCVD_IN_DNSWL_MED,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Two years ago I tried an AMD Radeon E8860 embedded GPU with the drm driver. The dmesg output included driver warnings about an invalid PCIe lane width. Tracking the problem back led to si_set_pcie_lane_width_in_smc(). The calculation of the lane widths via ATOM_PPLIB_PCIE_LINK_WIDTH_MASK and ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT macros did not increment the resulting value, per the comment in pptable.h ("lanes - 1"), and per usage elsewhere. Applying the increment silenced the warnings. The code has not changed since, so either my analysis was incorrect or the bug has gone unnoticed. Hence submitting this as an RFC. Signed-off-by: Paul Parsons diff -ru a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c --- a/drivers/gpu/drm/radeon/si_dpm.c 2016-03-14 04:28:54.000000000 +0000 +++ b/drivers/gpu/drm/radeon/si_dpm.c 2016-04-02 11:43:47.146616182 +0100 @@ -5920,9 +5920,9 @@ { u32 lane_width; u32 new_lane_width = - (radeon_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT; + ((radeon_new_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; u32 current_lane_width = - (radeon_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT; + ((radeon_current_state->caps & ATOM_PPLIB_PCIE_LINK_WIDTH_MASK) >> ATOM_PPLIB_PCIE_LINK_WIDTH_SHIFT) + 1; if (new_lane_width != current_lane_width) { radeon_set_pcie_lanes(rdev, new_lane_width);