From patchwork Thu Sep 1 11:23:04 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 9310311 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 69BE060760 for ; Fri, 2 Sep 2016 02:00:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 594552957E for ; Fri, 2 Sep 2016 02:00:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4DA5529627; Fri, 2 Sep 2016 02:00:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 72CBA2957E for ; Fri, 2 Sep 2016 02:00:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 64A106EA0C; Fri, 2 Sep 2016 01:59:33 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from comal.ext.ti.com (comal.ext.ti.com [198.47.26.152]) by gabe.freedesktop.org (Postfix) with ESMTPS id C6E306E909 for ; Thu, 1 Sep 2016 11:30:07 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id u81BNotn026396; Thu, 1 Sep 2016 06:23:50 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u81BNntV024358; Thu, 1 Sep 2016 06:23:49 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 1 Sep 2016 06:23:49 -0500 Received: from dlep33.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u81BNMwr024982; Thu, 1 Sep 2016 06:23:47 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH 10/26] drm/omap: omap_display_timings: rename vfp to vfront_porch Date: Thu, 1 Sep 2016 14:23:04 +0300 Message-ID: <20160901112320.15246-11-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160901112320.15246-1-peter.ujfalusi@ti.com> References: <20160901112320.15246-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 02 Sep 2016 01:59:29 +0000 Cc: daniel.vetter@ffwll.ch, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP In preparation to move the stack to use the generic videmode struct for display timing information. Signed-off-by: Peter Ujfalusi --- drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c | 2 +- drivers/gpu/drm/omapdrm/displays/connector-dvi.c | 2 +- drivers/gpu/drm/omapdrm/displays/connector-hdmi.c | 2 +- .../gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c | 2 +- drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c | 2 +- .../gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c | 2 +- drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c | 2 +- drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c | 2 +- drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c | 2 +- drivers/gpu/drm/omapdrm/dss/dispc.c | 15 ++++++++------- drivers/gpu/drm/omapdrm/dss/display.c | 4 ++-- drivers/gpu/drm/omapdrm/dss/dsi.c | 4 ++-- drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 6 +++--- drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 6 +++--- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 +- drivers/gpu/drm/omapdrm/dss/rfbi.c | 2 +- drivers/gpu/drm/omapdrm/dss/venc.c | 4 ++-- drivers/gpu/drm/omapdrm/omap_connector.c | 4 ++-- 18 files changed, 33 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c index ce33f47f4eea..51d0d45a6675 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c @@ -37,7 +37,7 @@ static const struct omap_video_timings tvc_pal_timings = { .hfront_porch = 12, .hback_porch = 68, .vsync_len = 5, - .vfp = 5, + .vfront_porch = 5, .vbp = 41, .interlace = true, diff --git a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c index 91516fbc711b..efd122760833 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-dvi.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-dvi.c @@ -29,7 +29,7 @@ static const struct omap_video_timings dvic_default_timings = { .hsync_len = 32, .hback_porch = 80, - .vfp = 3, + .vfront_porch = 3, .vsync_len = 4, .vbp = 7, diff --git a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c index 6e75da30dc9d..7d60e465d354 100644 --- a/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c +++ b/drivers/gpu/drm/omapdrm/displays/connector-hdmi.c @@ -29,7 +29,7 @@ static const struct omap_video_timings hdmic_default_timings = { .hfront_porch = 16, .hback_porch = 48, .vsync_len = 2, - .vfp = 11, + .vfront_porch = 11, .vbp = 31, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, diff --git a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c index 5b2dd1e48705..66d30ba7db81 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c @@ -30,7 +30,7 @@ static struct omap_video_timings lb035q02_timings = { .hback_porch = 68, .vsync_len = 2, - .vfp = 4, + .vfront_porch = 4, .vbp = 18, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, diff --git a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c index ce0ab77a6fcd..9cb02c4bce41 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c @@ -72,7 +72,7 @@ static const struct omap_video_timings nec_8048_panel_timings = { .hfront_porch = 6, .hsync_len = 1, .hback_porch = 4, - .vfp = 3, + .vfront_porch = 3, .vsync_len = 1, .vbp = 4, diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c index 917f145e8d88..3b23aaf2676d 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c @@ -46,7 +46,7 @@ static const struct omap_video_timings sharp_ls_timings = { .hback_porch = 28, .vsync_len = 1, - .vfp = 1, + .vfront_porch = 1, .vbp = 1, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, diff --git a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c index 2a42985782fd..6b1140b82f6e 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c @@ -99,7 +99,7 @@ static const struct omap_video_timings acx565akm_panel_timings = { .hfront_porch = 28, .hsync_len = 4, .hback_porch = 24, - .vfp = 3, + .vfront_porch = 3, .vsync_len = 3, .vbp = 4, diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c index 693b9ec9326e..48fa05974158 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c @@ -49,7 +49,7 @@ static struct omap_video_timings td028ttec1_panel_timings = { .hfront_porch = 24, .hsync_len = 8, .hback_porch = 8, - .vfp = 4, + .vfront_porch = 4, .vsync_len = 2, .vbp = 2, diff --git a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c index 6301701c820e..2d3bda3c9376 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c @@ -83,7 +83,7 @@ static const struct omap_video_timings tpo_td043_timings = { .hback_porch = 214, .vsync_len = 1, - .vfp = 39, + .vfront_porch = 39, .vbp = 34, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 60a4c6001900..0cd7787fd29d 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -2869,8 +2869,8 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, } else { int wbdelay; - wbdelay = min(mgr_timings->vfp + mgr_timings->vsync_len + - mgr_timings->vbp, 255); + wbdelay = min(mgr_timings->vfront_porch + + mgr_timings->vsync_len + mgr_timings->vbp, 255); /* WBDELAYCOUNT */ REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0); @@ -3133,7 +3133,8 @@ bool dispc_mgr_timings_ok(enum omap_channel channel, if (!_dispc_lcd_timings_ok(timings->hsync_len, timings->hfront_porch, timings->hback_porch, - timings->vsync_len, timings->vfp, timings->vbp)) + timings->vsync_len, timings->vfront_porch, + timings->vbp)) return false; } @@ -3270,12 +3271,12 @@ void dispc_mgr_set_timings(enum omap_channel channel, if (dss_mgr_is_lcd(channel)) { _dispc_mgr_set_lcd_timings(channel, t.hsync_len, t.hfront_porch, - t.hback_porch, t.vsync_len, t.vfp, t.vbp, + t.hback_porch, t.vsync_len, t.vfront_porch, t.vbp, t.vsync_level, t.hsync_level, t.data_pclk_edge, t.de_level, t.sync_pclk_edge); xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hback_porch; - ytot = t.vactive + t.vfp + t.vsync_len + t.vbp; + ytot = t.vactive + t.vfront_porch + t.vsync_len + t.vbp; ht = timings->pixelclock / xtot; vt = timings->pixelclock / xtot / ytot; @@ -3283,7 +3284,7 @@ void dispc_mgr_set_timings(enum omap_channel channel, DSSDBG("pck %u\n", timings->pixelclock); DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", t.hsync_len, t.hfront_porch, t.hback_porch, - t.vsync_len, t.vfp, t.vbp); + t.vsync_len, t.vfront_porch, t.vbp); DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n", t.vsync_level, t.hsync_level, t.data_pclk_edge, t.de_level, t.sync_pclk_edge); @@ -4227,7 +4228,7 @@ static const struct dispc_errata_i734_data { .hactive = 8, .vactive = 1, .pixelclock = 16000000, .hsync_len = 8, .hfront_porch = 4, .hback_porch = 4, - .vsync_len = 1, .vfp = 1, .vbp = 1, + .vsync_len = 1, .vfront_porch = 1, .vbp = 1, .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, .interlace = false, diff --git a/drivers/gpu/drm/omapdrm/dss/display.c b/drivers/gpu/drm/omapdrm/dss/display.c index 372a16ad770f..30060b5e46a2 100644 --- a/drivers/gpu/drm/omapdrm/dss/display.c +++ b/drivers/gpu/drm/omapdrm/dss/display.c @@ -230,7 +230,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm, ovt->hsync_len = vm->hsync_len; ovt->vactive = vm->vactive; ovt->vbp = vm->vback_porch; - ovt->vfp = vm->vfront_porch; + ovt->vfront_porch = vm->vfront_porch; ovt->vsync_len = vm->vsync_len; ovt->vsync_level = vm->flags & DISPLAY_FLAGS_VSYNC_HIGH ? @@ -263,7 +263,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt, vm->hsync_len = ovt->hsync_len; vm->vactive = ovt->vactive; vm->vback_porch = ovt->vbp; - vm->vfront_porch = ovt->vfp; + vm->vfront_porch = ovt->vfront_porch; vm->vsync_len = ovt->vsync_len; if (ovt->hsync_level == OMAPDSS_SIG_ACTIVE_HIGH) diff --git a/drivers/gpu/drm/omapdrm/dss/dsi.c b/drivers/gpu/drm/omapdrm/dss/dsi.c index 9af31b377361..4eb199dc6d09 100644 --- a/drivers/gpu/drm/omapdrm/dss/dsi.c +++ b/drivers/gpu/drm/omapdrm/dss/dsi.c @@ -4424,7 +4424,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck, t->hactive = ctx->config->timings->hactive; t->vactive = ctx->config->timings->vactive; t->hsync_len = t->hfront_porch = t->hback_porch = t->vsync_len = 1; - t->vfp = t->vbp = 0; + t->vfront_porch = t->vbp = 0; return true; } @@ -4637,7 +4637,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx) dsi_vm->vsa = req_vm->vsync_len; dsi_vm->vbp = req_vm->vbp; dsi_vm->vact = req_vm->vactive; - dsi_vm->vfp = req_vm->vfp; + dsi_vm->vfp = req_vm->vfront_porch; dsi_vm->trans_mode = cfg->trans_mode; diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c index 39944749c160..932975b372c0 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi5_core.c @@ -300,7 +300,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg, cfg->timings.hback_porch + cfg->timings.hsync_len; video_cfg->vblank_osc = 0; video_cfg->vblank = cfg->timings.vsync_len + - cfg->timings.vfp + cfg->timings.vbp; + cfg->timings.vfront_porch + cfg->timings.vbp; video_cfg->v_fc_config.hdmi_dvi_mode = cfg->hdmi_dvi_mode; if (cfg->timings.interlace) { @@ -310,7 +310,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg, video_cfg->v_fc_config.timings.vactive /= 2; video_cfg->vblank /= 2; - video_cfg->v_fc_config.timings.vfp /= 2; + video_cfg->v_fc_config.timings.vfront_porch /= 2; video_cfg->v_fc_config.timings.vsync_len /= 2; video_cfg->v_fc_config.timings.vbp /= 2; } @@ -373,7 +373,7 @@ static void hdmi_core_video_config(struct hdmi_core_data *core, /* set vertical sync offset */ REG_FLD_MOD(base, HDMI_CORE_FC_VSYNCINDELAY, - cfg->v_fc_config.timings.vfp, 7, 0); + cfg->v_fc_config.timings.vfront_porch, 7, 0); /* set horizontal sync pulse width */ REG_FLD_MOD(base, HDMI_CORE_FC_HSYNCINWIDTH1, diff --git a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c index ba964c12148d..ed6ce7474bad 100644 --- a/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c +++ b/drivers/gpu/drm/omapdrm/dss/hdmi_wp.c @@ -187,7 +187,7 @@ void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp, hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h); timing_v |= FLD_VAL(timings->vbp, 31, 20); - timing_v |= FLD_VAL(timings->vfp, 19, 8); + timing_v |= FLD_VAL(timings->vfront_porch, 19, 8); timing_v |= FLD_VAL(timings->vsync_len, 7, 0); hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_V, timing_v); } @@ -205,7 +205,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, timings->hfront_porch = param->timings.hfront_porch; timings->hsync_len = param->timings.hsync_len; timings->vbp = param->timings.vbp; - timings->vfp = param->timings.vfp; + timings->vfront_porch = param->timings.vfront_porch; timings->vsync_len = param->timings.vsync_len; timings->vsync_level = param->timings.vsync_level; @@ -216,7 +216,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt, if (param->timings.interlace) { video_fmt->y_res /= 2; timings->vbp /= 2; - timings->vfp /= 2; + timings->vfront_porch /= 2; timings->vsync_len /= 2; } diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index c761583b0b24..141bcb34db78 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -315,7 +315,7 @@ struct omap_video_timings { /* Unit: line clocks */ u16 vsync_len; /* Vertical synchronization pulse width */ /* Unit: line clocks */ - u16 vfp; /* Vertical front porch */ + u16 vfront_porch; /* Vertical front porch */ /* Unit: line clocks */ u16 vbp; /* Vertical back porch */ diff --git a/drivers/gpu/drm/omapdrm/dss/rfbi.c b/drivers/gpu/drm/omapdrm/dss/rfbi.c index b90348ad2e31..de7f904f6e91 100644 --- a/drivers/gpu/drm/omapdrm/dss/rfbi.c +++ b/drivers/gpu/drm/omapdrm/dss/rfbi.c @@ -862,7 +862,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev) rfbi.timings.hfront_porch = 1; rfbi.timings.hback_porch = 1; rfbi.timings.vsync_len = 1; - rfbi.timings.vfp = 0; + rfbi.timings.vfront_porch = 0; rfbi.timings.vbp = 0; rfbi.timings.interlace = false; diff --git a/drivers/gpu/drm/omapdrm/dss/venc.c b/drivers/gpu/drm/omapdrm/dss/venc.c index 5e8ea7e00b68..77d4c826b2e5 100644 --- a/drivers/gpu/drm/omapdrm/dss/venc.c +++ b/drivers/gpu/drm/omapdrm/dss/venc.c @@ -270,7 +270,7 @@ const struct omap_video_timings omap_dss_pal_timings = { .hfront_porch = 12, .hback_porch = 68, .vsync_len = 5, - .vfp = 5, + .vfront_porch = 5, .vbp = 41, .interlace = true, @@ -291,7 +291,7 @@ const struct omap_video_timings omap_dss_ntsc_timings = { .hfront_porch = 16, .hback_porch = 58, .vsync_len = 6, - .vfp = 6, + .vfront_porch = 6, .vbp = 31, .interlace = true, diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index 2c9b429da5cc..3798617b1d7b 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c @@ -53,7 +53,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode, mode->htotal = mode->hsync_end + timings->hback_porch; mode->vdisplay = timings->vactive; - mode->vsync_start = mode->vdisplay + timings->vfp; + mode->vsync_start = mode->vdisplay + timings->vfront_porch; mode->vsync_end = mode->vsync_start + timings->vsync_len; mode->vtotal = mode->vsync_end + timings->vbp; @@ -87,7 +87,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings, timings->hback_porch = mode->htotal - mode->hsync_end; timings->vactive = mode->vdisplay; - timings->vfp = mode->vsync_start - mode->vdisplay; + timings->vfront_porch = mode->vsync_start - mode->vdisplay; timings->vsync_len = mode->vsync_end - mode->vsync_start; timings->vbp = mode->vtotal - mode->vsync_end;