From patchwork Thu Sep 1 11:23:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 9310329 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 60A1360760 for ; Fri, 2 Sep 2016 02:00:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 50802295BE for ; Fri, 2 Sep 2016 02:00:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 449E029627; Fri, 2 Sep 2016 02:00:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D9CF9295BE for ; Fri, 2 Sep 2016 02:00:27 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C5BA76E9EA; Fri, 2 Sep 2016 01:59:35 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from arroyo.ext.ti.com (arroyo.ext.ti.com [198.47.19.12]) by gabe.freedesktop.org (Postfix) with ESMTPS id BBEB16E91C for ; Thu, 1 Sep 2016 11:24:14 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by arroyo.ext.ti.com (8.13.7/8.13.7) with ESMTP id u81BOCVQ032541; Thu, 1 Sep 2016 06:24:12 -0500 Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id u81BOCaX024638; Thu, 1 Sep 2016 06:24:12 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Thu, 1 Sep 2016 06:24:11 -0500 Received: from dlep33.itg.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u81BNMx3024982; Thu, 1 Sep 2016 06:24:10 -0500 From: Peter Ujfalusi To: , , Subject: [PATCH 20/26] drm/omap: Change the types of struct omap_video_timings members Date: Thu, 1 Sep 2016 14:23:14 +0300 Message-ID: <20160901112320.15246-21-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20160901112320.15246-1-peter.ujfalusi@ti.com> References: <20160901112320.15246-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-Mailman-Approved-At: Fri, 02 Sep 2016 01:59:29 +0000 Cc: daniel.vetter@ffwll.ch, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP omap_video_timings struct have the same members as struct videomode, but their types are different. As first step change the types of the omap_video_timings struct members to match their counterpart in struct videomode to catch any type cast related issues. Signed-off-by: Peter Ujfalusi --- drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c | 2 +- drivers/gpu/drm/omapdrm/dss/dispc.c | 5 +++-- drivers/gpu/drm/omapdrm/dss/dpi.c | 2 +- drivers/gpu/drm/omapdrm/dss/omapdss.h | 18 +++++++++--------- drivers/gpu/drm/omapdrm/dss/sdi.c | 2 +- 5 files changed, 15 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c index c3d2a12358fa..8f676b8ac038 100644 --- a/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c +++ b/drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c @@ -1023,7 +1023,7 @@ static int dsicm_memory_read(struct omap_dss_device *dssdev, goto err1; } - size = min(w * h * 3, + size = min((u32)w * h * 3, dssdev->panel.timings.hactive * dssdev->panel.timings.vactive * 3); diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 30f8b732be44..eb3454dd55b1 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -2870,7 +2870,8 @@ int dispc_wb_setup(const struct omap_dss_writeback_info *wi, int wbdelay; wbdelay = min(mgr_timings->vfront_porch + - mgr_timings->vsync_len + mgr_timings->vback_porch, 255); + mgr_timings->vsync_len + mgr_timings->vback_porch, + (u32)255); /* WBDELAYCOUNT */ REG_FLD_MOD(DISPC_OVL_ATTRIBUTES2(plane), wbdelay, 7, 0); @@ -3242,7 +3243,7 @@ void dispc_mgr_set_timings(enum omap_channel channel, ht = timings->pixelclock / xtot; vt = timings->pixelclock / xtot / ytot; - DSSDBG("pck %u\n", timings->pixelclock); + DSSDBG("pck %lu\n", timings->pixelclock); DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n", t.hsync_len, t.hfront_porch, t.hback_porch, t.vsync_len, t.vfront_porch, t.vback_porch); diff --git a/drivers/gpu/drm/omapdrm/dss/dpi.c b/drivers/gpu/drm/omapdrm/dss/dpi.c index d653f492cbfd..8fb40efa65af 100644 --- a/drivers/gpu/drm/omapdrm/dss/dpi.c +++ b/drivers/gpu/drm/omapdrm/dss/dpi.c @@ -351,7 +351,7 @@ static int dpi_set_mode(struct dpi_data *dpi) pck = fck / lck_div / pck_div; if (pck != t->pixelclock) { - DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", + DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n", t->pixelclock, pck); t->pixelclock = pck; diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index 0d8228426505..21a93401c6ae 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -301,23 +301,23 @@ struct omap_dss_dsi_config { struct omap_video_timings { /* Unit: pixels */ - u16 hactive; + u32 hactive; /* Unit: pixels */ - u16 vactive; + u32 vactive; /* Unit: Hz */ - u32 pixelclock; + unsigned long pixelclock; /* Unit: pixel clocks */ - u16 hsync_len; /* Horizontal synchronization pulse width */ + u32 hsync_len; /* Horizontal synchronization pulse width */ /* Unit: pixel clocks */ - u16 hfront_porch; /* Horizontal front porch */ + u32 hfront_porch; /* Horizontal front porch */ /* Unit: pixel clocks */ - u16 hback_porch; /* Horizontal back porch */ + u32 hback_porch; /* Horizontal back porch */ /* Unit: line clocks */ - u16 vsync_len; /* Vertical synchronization pulse width */ + u32 vsync_len; /* Vertical synchronization pulse width */ /* Unit: line clocks */ - u16 vfront_porch; /* Vertical front porch */ + u32 vfront_porch; /* Vertical front porch */ /* Unit: line clocks */ - u16 vback_porch; /* Vertical back porch */ + u32 vback_porch; /* Vertical back porch */ enum display_flags flags; /* display flags */ }; diff --git a/drivers/gpu/drm/omapdrm/dss/sdi.c b/drivers/gpu/drm/omapdrm/dss/sdi.c index 3b076329a3ac..c8658f97ab7d 100644 --- a/drivers/gpu/drm/omapdrm/dss/sdi.c +++ b/drivers/gpu/drm/omapdrm/dss/sdi.c @@ -162,7 +162,7 @@ static int sdi_display_enable(struct omap_dss_device *dssdev) pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div; if (pck != t->pixelclock) { - DSSWARN("Could not find exact pixel clock. Requested %d Hz, got %lu Hz\n", + DSSWARN("Could not find exact pixel clock. Requested %lu Hz, got %lu Hz\n", t->pixelclock, pck); t->pixelclock = pck;