@@ -35,7 +35,7 @@ static const struct omap_video_timings tvc_pal_timings = {
.pixelclock = 13500000,
.hsync_len = 64,
.hfront_porch = 12,
- .hbp = 68,
+ .hback_porch = 68,
.vsw = 5,
.vfp = 5,
.vbp = 41,
@@ -27,7 +27,7 @@ static const struct omap_video_timings dvic_default_timings = {
.hfront_porch = 48,
.hsync_len = 32,
- .hbp = 80,
+ .hback_porch = 80,
.vfp = 3,
.vsw = 4,
@@ -27,7 +27,7 @@ static const struct omap_video_timings hdmic_default_timings = {
.pixelclock = 25175000,
.hsync_len = 96,
.hfront_porch = 16,
- .hbp = 48,
+ .hback_porch = 48,
.vsw = 2,
.vfp = 11,
.vbp = 31,
@@ -27,7 +27,7 @@ static struct omap_video_timings lb035q02_timings = {
.hsync_len = 2,
.hfront_porch = 20,
- .hbp = 68,
+ .hback_porch = 68,
.vsw = 2,
.vfp = 4,
@@ -71,7 +71,7 @@ static const struct omap_video_timings nec_8048_panel_timings = {
.pixelclock = LCD_PIXEL_CLOCK,
.hfront_porch = 6,
.hsync_len = 1,
- .hbp = 4,
+ .hback_porch = 4,
.vfp = 3,
.vsw = 1,
.vbp = 4,
@@ -43,7 +43,7 @@ static const struct omap_video_timings sharp_ls_timings = {
.hsync_len = 2,
.hfront_porch = 1,
- .hbp = 28,
+ .hback_porch = 28,
.vsw = 1,
.vfp = 1,
@@ -98,7 +98,7 @@ static const struct omap_video_timings acx565akm_panel_timings = {
.pixelclock = 24000000,
.hfront_porch = 28,
.hsync_len = 4,
- .hbp = 24,
+ .hback_porch = 24,
.vfp = 3,
.vsw = 3,
.vbp = 4,
@@ -48,7 +48,7 @@ static struct omap_video_timings td028ttec1_panel_timings = {
.pixelclock = 22153000,
.hfront_porch = 24,
.hsync_len = 8,
- .hbp = 8,
+ .hback_porch = 8,
.vfp = 4,
.vsw = 2,
.vbp = 2,
@@ -80,7 +80,7 @@ static const struct omap_video_timings tpo_td043_timings = {
.hsync_len = 1,
.hfront_porch = 68,
- .hbp = 214,
+ .hback_porch = 214,
.vsw = 1,
.vfp = 39,
@@ -2190,14 +2190,14 @@ static int check_horiz_timing_omap3(unsigned long pclk, unsigned long lclk,
int i;
nonactive = t->hactive + t->hfront_porch + t->hsync_len +
- t->hbp - out_width;
+ t->hback_porch - out_width;
i = 0;
if (out_height < height)
i++;
if (out_width < width)
i++;
- blank = div_u64((u64)(t->hbp + t->hsync_len + t->hfront_porch) *
+ blank = div_u64((u64)(t->hback_porch + t->hsync_len + t->hfront_porch) *
lclk, pclk);
DSSDBG("blanking period + ppl = %llu (limit = %u)\n", blank, limits[i]);
if (blank <= limits[i])
@@ -3132,7 +3132,7 @@ bool dispc_mgr_timings_ok(enum omap_channel channel,
return false;
if (!_dispc_lcd_timings_ok(timings->hsync_len,
- timings->hfront_porch, timings->hbp,
+ timings->hfront_porch, timings->hback_porch,
timings->vsw, timings->vfp, timings->vbp))
return false;
}
@@ -3270,11 +3270,11 @@ void dispc_mgr_set_timings(enum omap_channel channel,
if (dss_mgr_is_lcd(channel)) {
_dispc_mgr_set_lcd_timings(channel, t.hsync_len, t.hfront_porch,
- t.hbp, t.vsw, t.vfp, t.vbp, t.vsync_level,
- t.hsync_level, t.data_pclk_edge, t.de_level,
- t.sync_pclk_edge);
+ t.hback_porch, t.vsw, t.vfp, t.vbp,
+ t.vsync_level, t.hsync_level, t.data_pclk_edge,
+ t.de_level, t.sync_pclk_edge);
- xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hbp;
+ xtot = t.hactive + t.hfront_porch + t.hsync_len + t.hback_porch;
ytot = t.vactive + t.vfp + t.vsw + t.vbp;
ht = timings->pixelclock / xtot;
@@ -3282,7 +3282,8 @@ void dispc_mgr_set_timings(enum omap_channel channel,
DSSDBG("pck %u\n", timings->pixelclock);
DSSDBG("hsync_len %d hfp %d hbp %d vsw %d vfp %d vbp %d\n",
- t.hsync_len, t.hfront_porch, t.hbp, t.vsw, t.vfp, t.vbp);
+ t.hsync_len, t.hfront_porch, t.hback_porch,
+ t.vsw, t.vfp, t.vbp);
DSSDBG("vsync_level %d hsync_level %d data_pclk_edge %d de_level %d sync_pclk_edge %d\n",
t.vsync_level, t.hsync_level, t.data_pclk_edge,
t.de_level, t.sync_pclk_edge);
@@ -4225,7 +4226,7 @@ static const struct dispc_errata_i734_data {
.timings = {
.hactive = 8, .vactive = 1,
.pixelclock = 16000000,
- .hsync_len = 8, .hfront_porch = 4, .hbp = 4,
+ .hsync_len = 8, .hfront_porch = 4, .hback_porch = 4,
.vsw = 1, .vfp = 1, .vbp = 1,
.vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
.hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
@@ -225,7 +225,7 @@ void videomode_to_omap_video_timings(const struct videomode *vm,
ovt->pixelclock = vm->pixelclock;
ovt->hactive = vm->hactive;
- ovt->hbp = vm->hback_porch;
+ ovt->hback_porch = vm->hback_porch;
ovt->hfront_porch = vm->hfront_porch;
ovt->hsync_len = vm->hsync_len;
ovt->vactive = vm->vactive;
@@ -258,7 +258,7 @@ void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
vm->pixelclock = ovt->pixelclock;
vm->hactive = ovt->hactive;
- vm->hback_porch = ovt->hbp;
+ vm->hback_porch = ovt->hback_porch;
vm->hfront_porch = ovt->hfront_porch;
vm->hsync_len = ovt->hsync_len;
vm->vactive = ovt->vactive;
@@ -4423,7 +4423,7 @@ static bool dsi_cm_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
t->pixelclock = pck;
t->hactive = ctx->config->timings->hactive;
t->vactive = ctx->config->timings->vactive;
- t->hsync_len = t->hfront_porch = t->hbp = t->vsw = 1;
+ t->hsync_len = t->hfront_porch = t->hback_porch = t->vsw = 1;
t->vfp = t->vbp = 0;
return true;
@@ -4527,7 +4527,8 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
xres = req_vm->hactive;
- panel_hbl = req_vm->hfront_porch + req_vm->hbp + req_vm->hsync_len;
+ panel_hbl = req_vm->hfront_porch + req_vm->hback_porch +
+ req_vm->hsync_len;
panel_htot = xres + panel_hbl;
dsi_hact = DIV_ROUND_UP(DIV_ROUND_UP(xres * bitspp, 8) + 6, ndl);
@@ -4603,7 +4604,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
hsa = max(hsa - hse, 1);
}
- hbp = div64_u64((u64)req_vm->hbp * byteclk, req_pck_nom);
+ hbp = div64_u64((u64)req_vm->hback_porch * byteclk, req_pck_nom);
hbp = max(hbp, 1);
hfp = dsi_hbl - (hss + hsa + hse + hbp);
@@ -4662,7 +4663,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
hsa = 1;
}
- hbp = div64_u64((u64)req_vm->hbp * dispc_pck, req_pck_nom);
+ hbp = div64_u64((u64)req_vm->hback_porch * dispc_pck, req_pck_nom);
hbp = max(hbp, 1);
hfp = dispc_hbl - hsa - hbp;
@@ -4687,7 +4688,7 @@ static bool dsi_vm_calc_blanking(struct dsi_clk_calc_ctx *ctx)
dispc_vm->hfront_porch = hfp;
dispc_vm->hsync_len = hsa;
- dispc_vm->hbp = hbp;
+ dispc_vm->hback_porch = hbp;
return true;
}
@@ -297,7 +297,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
/* video core */
video_cfg->data_enable_pol = 1; /* It is always 1*/
video_cfg->hblank = cfg->timings.hfront_porch +
- cfg->timings.hbp + cfg->timings.hsync_len;
+ cfg->timings.hback_porch + cfg->timings.hsync_len;
video_cfg->vblank_osc = 0;
video_cfg->vblank = cfg->timings.vsw +
cfg->timings.vfp + cfg->timings.vbp;
@@ -320,7 +320,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
video_cfg->hblank *= 2;
video_cfg->v_fc_config.timings.hfront_porch *= 2;
video_cfg->v_fc_config.timings.hsync_len *= 2;
- video_cfg->v_fc_config.timings.hbp *= 2;
+ video_cfg->v_fc_config.timings.hback_porch *= 2;
}
}
@@ -181,7 +181,7 @@ void hdmi_wp_video_config_timing(struct hdmi_wp_data *wp,
omapdss_get_version() == OMAPDSS_VER_OMAP4)
hsync_len_offset = 0;
- timing_h |= FLD_VAL(timings->hbp, 31, 20);
+ timing_h |= FLD_VAL(timings->hback_porch, 31, 20);
timing_h |= FLD_VAL(timings->hfront_porch, 19, 8);
timing_h |= FLD_VAL(timings->hsync_len - hsync_len_offset, 7, 0);
hdmi_write_reg(wp->base, HDMI_WP_VIDEO_TIMING_H, timing_h);
@@ -201,7 +201,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
video_fmt->y_res = param->timings.vactive;
video_fmt->x_res = param->timings.hactive;
- timings->hbp = param->timings.hbp;
+ timings->hback_porch = param->timings.hback_porch;
timings->hfront_porch = param->timings.hfront_porch;
timings->hsync_len = param->timings.hsync_len;
timings->vbp = param->timings.vbp;
@@ -224,7 +224,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
video_fmt->x_res *= 2;
timings->hfront_porch *= 2;
timings->hsync_len *= 2;
- timings->hbp *= 2;
+ timings->hback_porch *= 2;
}
}
@@ -311,7 +311,7 @@ struct omap_video_timings {
/* Unit: pixel clocks */
u16 hfront_porch; /* Horizontal front porch */
/* Unit: pixel clocks */
- u16 hbp; /* Horizontal back porch */
+ u16 hback_porch; /* Horizontal back porch */
/* Unit: line clocks */
u16 vsw; /* Vertical synchronization pulse width */
/* Unit: line clocks */
@@ -860,7 +860,7 @@ static void rfbi_config_lcd_manager(struct omap_dss_device *dssdev)
*/
rfbi.timings.hsync_len = 1;
rfbi.timings.hfront_porch = 1;
- rfbi.timings.hbp = 1;
+ rfbi.timings.hback_porch = 1;
rfbi.timings.vsw = 1;
rfbi.timings.vfp = 0;
rfbi.timings.vbp = 0;
@@ -268,7 +268,7 @@ const struct omap_video_timings omap_dss_pal_timings = {
.pixelclock = 13500000,
.hsync_len = 64,
.hfront_porch = 12,
- .hbp = 68,
+ .hback_porch = 68,
.vsw = 5,
.vfp = 5,
.vbp = 41,
@@ -289,7 +289,7 @@ const struct omap_video_timings omap_dss_ntsc_timings = {
.pixelclock = 13500000,
.hsync_len = 64,
.hfront_porch = 16,
- .hbp = 58,
+ .hback_porch = 58,
.vsw = 6,
.vfp = 6,
.vbp = 31,
@@ -50,7 +50,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
mode->hdisplay = timings->hactive;
mode->hsync_start = mode->hdisplay + timings->hfront_porch;
mode->hsync_end = mode->hsync_start + timings->hsync_len;
- mode->htotal = mode->hsync_end + timings->hbp;
+ mode->htotal = mode->hsync_end + timings->hback_porch;
mode->vdisplay = timings->vactive;
mode->vsync_start = mode->vdisplay + timings->vfp;
@@ -84,7 +84,7 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
timings->hactive = mode->hdisplay;
timings->hfront_porch = mode->hsync_start - mode->hdisplay;
timings->hsync_len = mode->hsync_end - mode->hsync_start;
- timings->hbp = mode->htotal - mode->hsync_end;
+ timings->hback_porch = mode->htotal - mode->hsync_end;
timings->vactive = mode->vdisplay;
timings->vfp = mode->vsync_start - mode->vdisplay;
In preparation to move the stack to use the generic videmode struct for display timing information. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> --- .../gpu/drm/omapdrm/displays/connector-analog-tv.c | 2 +- drivers/gpu/drm/omapdrm/displays/connector-dvi.c | 2 +- drivers/gpu/drm/omapdrm/displays/connector-hdmi.c | 2 +- .../drm/omapdrm/displays/panel-lgphilips-lb035q02.c | 2 +- .../gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c | 2 +- .../drm/omapdrm/displays/panel-sharp-ls037v7dw01.c | 2 +- .../gpu/drm/omapdrm/displays/panel-sony-acx565akm.c | 2 +- .../gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c | 2 +- .../gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c | 2 +- drivers/gpu/drm/omapdrm/dss/dispc.c | 19 ++++++++++--------- drivers/gpu/drm/omapdrm/dss/display.c | 4 ++-- drivers/gpu/drm/omapdrm/dss/dsi.c | 11 ++++++----- drivers/gpu/drm/omapdrm/dss/hdmi5_core.c | 4 ++-- drivers/gpu/drm/omapdrm/dss/hdmi_wp.c | 6 +++--- drivers/gpu/drm/omapdrm/dss/omapdss.h | 2 +- drivers/gpu/drm/omapdrm/dss/rfbi.c | 2 +- drivers/gpu/drm/omapdrm/dss/venc.c | 4 ++-- drivers/gpu/drm/omapdrm/omap_connector.c | 4 ++-- 18 files changed, 38 insertions(+), 36 deletions(-)