From patchwork Tue Dec 20 07:40:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell Currey X-Patchwork-Id: 9482429 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0065A60821 for ; Wed, 21 Dec 2016 01:28:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D8FD8281AA for ; Wed, 21 Dec 2016 01:28:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CA40728343; Wed, 21 Dec 2016 01:28:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id B2C73281AA for ; Wed, 21 Dec 2016 01:28:54 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C23F56EAC3; Wed, 21 Dec 2016 01:28:44 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from russell.cc (russell.cc [IPv6:2404:9400:2:0:216:3eff:fee0:3370]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1F28F6E8F8 for ; Tue, 20 Dec 2016 07:40:56 +0000 (UTC) Received: from snap.ozlabs.ibm.com (static-82-10.transact.net.au [122.99.82.10]) by russell.cc (OpenSMTPD) with ESMTPSA id ff790a8f (TLSv1.2:ECDHE-RSA-AES128-GCM-SHA256:128:NO); Tue, 20 Dec 2016 07:40:49 +0000 (UTC) From: Russell Currey To: airlied@redhat.com Subject: [PATCH] drivers/gpu/drm/ast: Support reading configuration values from device tree Date: Tue, 20 Dec 2016 18:40:45 +1100 Message-Id: <20161220074045.8651-1-ruscur@russell.cc> X-Mailer: git-send-email 2.11.0 X-Mailman-Approved-At: Wed, 21 Dec 2016 01:28:43 +0000 Cc: dri-devel@lists.freedesktop.org, Russell Currey X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The ast driver configures a window to enable access into BMC memory space in order to read some configuration registers. If this window is disabled, which it can be from the BMC side, the ast driver can't function. Closing this window is a necessity for security if a machine's host side and BMC side are controlled by different parties; i.e. a cloud provider offering machines "bare metal". To work around this, enable reading these configuration values from the device tree instead of through the window into BMC memory. This enables the driver to work when the window is closed; if the window is open, the driver functions as usual regardless of whether it uses the device tree or register accesses. Signed-off-by: Russell Currey --- This patch applies on top of my other patch "drivers/gpu/drm/ast: Fix infinite loop if read fails" which was recently applied to drm-misc-fixes. --- drivers/gpu/drm/ast/ast_main.c | 46 ++++++++++++++++++++++++++++-------------- 1 file changed, 31 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_main.c b/drivers/gpu/drm/ast/ast_main.c index f75c6421db62..9e362b4d913a 100644 --- a/drivers/gpu/drm/ast/ast_main.c +++ b/drivers/gpu/drm/ast/ast_main.c @@ -65,6 +65,7 @@ uint8_t ast_get_index_reg_mask(struct ast_private *ast, static int ast_detect_chip(struct drm_device *dev, bool *need_post) { + struct device_node *np = dev->pdev->dev.of_node; struct ast_private *ast = dev->dev_private; uint32_t data, jreg; ast_open_key(ast); @@ -140,10 +141,16 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) ast->support_wide_screen = true; else { ast->support_wide_screen = false; - /* Read SCU7c (silicon revision register) */ - ast_write32(ast, 0xf004, 0x1e6e0000); - ast_write32(ast, 0xf000, 0x1); - data = ast_read32(ast, 0x1207c); + + if (!np || of_property_read_u32(np, + "ast,scu-revision-id", + &data)) { + /* Read SCU7c (silicon revision register) */ + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + data = ast_read32(ast, 0x1207c); + } + data &= 0x300; if (ast->chip == AST2300 && data == 0x0) /* ast1300 */ ast->support_wide_screen = true; @@ -212,21 +219,24 @@ static int ast_detect_chip(struct drm_device *dev, bool *need_post) static int ast_get_dram_info(struct drm_device *dev) { + struct device_node *np = dev->pdev->dev.of_node; struct ast_private *ast = dev->dev_private; uint32_t data, data2; uint32_t denum, num, div, ref_pll; - ast_write32(ast, 0xf004, 0x1e6e0000); - ast_write32(ast, 0xf000, 0x1); + if (!np || of_property_read_u32(np, "ast,mcr-configuration", &data)) { + ast_write32(ast, 0xf004, 0x1e6e0000); + ast_write32(ast, 0xf000, 0x1); + ast_write32(ast, 0x10000, 0xfc600309); - ast_write32(ast, 0x10000, 0xfc600309); - - do { - if (pci_channel_offline(dev->pdev)) - return -EIO; - } while (ast_read32(ast, 0x10000) != 0x01); - data = ast_read32(ast, 0x10004); + /* poll until unlocked */ + do { + if (pci_channel_offline(dev->pdev)) + return -EIO; + } while (ast_read32(ast, 0x10000) != 0x01); + data = ast_read32(ast, 0x10004); + } if (data & 0x40) ast->dram_bus_width = 16; @@ -267,8 +277,14 @@ static int ast_get_dram_info(struct drm_device *dev) } } - data = ast_read32(ast, 0x10120); - data2 = ast_read32(ast, 0x10170); + if (!np || of_property_read_u32(np, "ast,mcr-scu-mpll", &data)) { + data = ast_read32(ast, 0x10120); + data2 = ast_read32(ast, 0x10170); + } else { + /* always 0 for AST2400 and AST2500 */ + data2 = 0; + } + if (data2 & 0x2000) ref_pll = 14318; else