From patchwork Thu Mar 16 20:47:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Icenowy Zheng X-Patchwork-Id: 9629537 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3123060244 for ; Fri, 17 Mar 2017 00:48:46 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2311128649 for ; Fri, 17 Mar 2017 00:48:46 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 167E12866F; Fri, 17 Mar 2017 00:48:46 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C57D428649 for ; Fri, 17 Mar 2017 00:48:45 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B0C636EC5E; Fri, 17 Mar 2017 00:48:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org X-Greylist: delayed 428 seconds by postgrey-1.35 at gabe; Thu, 16 Mar 2017 20:57:51 UTC Received: from forward6p.cmail.yandex.net (forward6p.cmail.yandex.net [IPv6:2a02:6b8:0:1465::fe]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8E76A6EBBD for ; Thu, 16 Mar 2017 20:57:51 +0000 (UTC) Received: from smtp3j.mail.yandex.net (smtp3j.mail.yandex.net [IPv6:2a02:6b8:0:801:1::12]) by forward6p.cmail.yandex.net (Yandex) with ESMTP id 7DDED21CB5; Thu, 16 Mar 2017 23:50:38 +0300 (MSK) Received: from smtp3j.mail.yandex.net (localhost.localdomain [127.0.0.1]) by smtp3j.mail.yandex.net (Yandex) with ESMTP id BB5086241013; Thu, 16 Mar 2017 23:50:31 +0300 (MSK) Received: by smtp3j.mail.yandex.net (nwsmtp/Yandex) with ESMTPSA id cN2NeqrDXI-oPNGOGfw; Thu, 16 Mar 2017 23:50:30 +0300 (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client certificate not present) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aosc.xyz; s=mail; t=1489697431; bh=7ocdJHbz0yxpCNIeRxtZW+oL5ZiqR/E4bga4VPP4Zv8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=N3eBm7k0l+N05YBRLpDmQ9kORToqTnlFmvVdZeJyEtDb2//H8I7xeCxvHqP9DmxEr QH2lShk8z1rSxfdSU+W4y9cVqZTdgIWnSEmsNkfSpmW4LDEZaWCK9raWEsbimNMu/Q fvCKZgXAFNChtL8XOzDqLqc14jtXdPSZT/92IbYY= Authentication-Results: smtp3j.mail.yandex.net; dkim=pass header.i=@aosc.xyz X-Yandex-ForeignMX: US X-Yandex-Suid-Status: 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 0, 1 1130000036118848 From: Icenowy Zheng To: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec Subject: [PATCH v2 6/8] ARM: dts: sun8i: add DE2 nodes for V3s SoC Date: Fri, 17 Mar 2017 04:47:46 +0800 Message-Id: <20170316204748.8596-7-icenowy@aosc.xyz> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170316204748.8596-1-icenowy@aosc.xyz> References: <20170316204748.8596-1-icenowy@aosc.xyz> X-Mailman-Approved-At: Fri, 17 Mar 2017 00:48:40 +0000 Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Icenowy Zheng , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Allwinner V3s SoC features a "Display Engine 2.0" with only one TCON which have RGB LCD output. Add device nodes for it as well as the TCON. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-v3s.dtsi | 87 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi index 71075969e5e6..3b29f11ad46a 100644 --- a/arch/arm/boot/dts/sun8i-v3s.dtsi +++ b/arch/arm/boot/dts/sun8i-v3s.dtsi @@ -41,6 +41,10 @@ */ #include +#include +#include +#include +#include / { #address-cells = <1>; @@ -59,6 +63,12 @@ }; }; + de: display-engine { + compatible = "allwinner,sun8i-v3s-display-engine"; + allwinner,pipelines = <&de2_mixer0>; + status = "disabled"; + }; + timer { compatible = "arm,armv7-timer"; interrupts = , @@ -93,6 +103,83 @@ #size-cells = <1>; ranges; + de2_clocks: clock@01000000 { + compatible = "allwinner,sun50i-h5-de2-clk"; + reg = <0x01000000 0x1c>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + de2_mixer0: mixer@01100000 { + compatible = "allwinner,sun8i-v3s-de2-mixer"; + reg = <0x01100000 0x100000>; + clocks = <&de2_clocks CLK_MIXER0>, + <&de2_clocks CLK_BUS_MIXER0>; + clock-names = "mod", + "bus"; + resets = <&de2_clocks RST_MIXER0>; + assigned-clocks = <&de2_clocks CLK_MIXER0>; + assigned-clock-rates = <150000000>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + mixer0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + mixer0_out_tcon0: endpoint@0 { + reg = <0>; + remote-endpoint = <&tcon0_in_mixer0>; + }; + }; + }; + }; + + tcon0: lcd-controller@01c0c000 { + compatible = "allwinner,sun8i-v3s-tcon"; + reg = <0x01c0c000 0x1000>; + interrupts = ; + clocks = <&ccu CLK_BUS_TCON0>, + <&ccu CLK_TCON0>; + clock-names = "ahb", + "tcon-ch0"; + clock-output-names = "tcon-pixel-clock"; + resets = <&ccu RST_BUS_TCON0>; + reset-names = "lcd"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + tcon0_in: port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + tcon0_in_mixer0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mixer0_out_tcon0>; + }; + }; + + tcon0_out: port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + }; + }; + }; + + mmc0: mmc@01c0f000 { compatible = "allwinner,sun7i-a20-mmc"; reg = <0x01c0f000 0x1000>;