| Message ID | 20170503083818.1228-1-l.stach@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Wed, 2017-05-03 at 10:38 +0200, Lucas Stach wrote: > By setting the SFTRST bit, the PRE will be held in the lowest power state > with clocks to the internal blocks gated. When external clock gating is > used (from the external clock controller, or by setting the CLKGATE bit) > the PRE will sporadically fail to start. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > v2: add missing clk_disable_unprepare in remove path > > This is a fix for newly introduced functionality and should be applied > for 4.12 fixes. > --- > drivers/gpu/ipu-v3/ipu-pre.c | 13 +++++-------- > 1 file changed, 5 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/ipu-v3/ipu-pre.c b/drivers/gpu/ipu-v3/ipu-pre.c > index c55563379e2e..c35f74c83065 100644 > --- a/drivers/gpu/ipu-v3/ipu-pre.c > +++ b/drivers/gpu/ipu-v3/ipu-pre.c > @@ -131,8 +131,6 @@ int ipu_pre_get(struct ipu_pre *pre) > if (pre->in_use) > return -EBUSY; > > - clk_prepare_enable(pre->clk_axi); > - > /* first get the engine out of reset and remove clock gating */ > writel(0, pre->regs + IPU_PRE_CTRL); > > @@ -149,12 +147,7 @@ int ipu_pre_get(struct ipu_pre *pre) > > void ipu_pre_put(struct ipu_pre *pre) > { > - u32 val; > - > - val = IPU_PRE_CTRL_SFTRST | IPU_PRE_CTRL_CLKGATE; > - writel(val, pre->regs + IPU_PRE_CTRL); > - > - clk_disable_unprepare(pre->clk_axi); > + writel(IPU_PRE_CTRL_SFTRST, pre->regs + IPU_PRE_CTRL); > > pre->in_use = false; > } > @@ -249,6 +242,8 @@ static int ipu_pre_probe(struct platform_device *pdev) > if (!pre->buffer_virt) > return -ENOMEM; > > + clk_prepare_enable(pre->clk_axi); > + > pre->dev = dev; > platform_set_drvdata(pdev, pre); > mutex_lock(&ipu_pre_list_mutex); > @@ -268,6 +263,8 @@ static int ipu_pre_remove(struct platform_device *pdev) > available_pres--; > mutex_unlock(&ipu_pre_list_mutex); > > + clk_disable_unprepare(pre->clk_axi); > + Thank you. I've applied this patch to imx-drm/fixes. regards Philipp
diff --git a/drivers/gpu/ipu-v3/ipu-pre.c b/drivers/gpu/ipu-v3/ipu-pre.c index c55563379e2e..c35f74c83065 100644 --- a/drivers/gpu/ipu-v3/ipu-pre.c +++ b/drivers/gpu/ipu-v3/ipu-pre.c @@ -131,8 +131,6 @@ int ipu_pre_get(struct ipu_pre *pre) if (pre->in_use) return -EBUSY; - clk_prepare_enable(pre->clk_axi); - /* first get the engine out of reset and remove clock gating */ writel(0, pre->regs + IPU_PRE_CTRL); @@ -149,12 +147,7 @@ int ipu_pre_get(struct ipu_pre *pre) void ipu_pre_put(struct ipu_pre *pre) { - u32 val; - - val = IPU_PRE_CTRL_SFTRST | IPU_PRE_CTRL_CLKGATE; - writel(val, pre->regs + IPU_PRE_CTRL); - - clk_disable_unprepare(pre->clk_axi); + writel(IPU_PRE_CTRL_SFTRST, pre->regs + IPU_PRE_CTRL); pre->in_use = false; } @@ -249,6 +242,8 @@ static int ipu_pre_probe(struct platform_device *pdev) if (!pre->buffer_virt) return -ENOMEM; + clk_prepare_enable(pre->clk_axi); + pre->dev = dev; platform_set_drvdata(pdev, pre); mutex_lock(&ipu_pre_list_mutex); @@ -268,6 +263,8 @@ static int ipu_pre_remove(struct platform_device *pdev) available_pres--; mutex_unlock(&ipu_pre_list_mutex); + clk_disable_unprepare(pre->clk_axi); + if (pre->buffer_virt) gen_pool_free(pre->iram, (unsigned long)pre->buffer_virt, IPU_PRE_MAX_WIDTH * IPU_PRE_NUM_SCANLINES * 4);
By setting the SFTRST bit, the PRE will be held in the lowest power state with clocks to the internal blocks gated. When external clock gating is used (from the external clock controller, or by setting the CLKGATE bit) the PRE will sporadically fail to start. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- v2: add missing clk_disable_unprepare in remove path This is a fix for newly introduced functionality and should be applied for 4.12 fixes. --- drivers/gpu/ipu-v3/ipu-pre.c | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-)