| Message ID | 20170508170109.GA11477@embeddedgus (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, May 8, 2017 at 1:01 PM, Gustavo A. R. Silva <garsilva@embeddedor.com> wrote: > Local variable use_doorbell is assigned to a constant value and it is never > updated again. Remove this variable and the dead code it guards. > > Addresses-Coverity-ID: 1401828 > Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> This code is already removed in the latest code queued for the next kernel for gfx8. For gfx7, I think Andres' priority patch set fixes this up for gfx7. Alex > --- > drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++---------------------- > 1 file changed, 20 insertions(+), 33 deletions(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > index 67afc90..e824c2b 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c > @@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) > { > int r, i, j; > u32 tmp; > - bool use_doorbell = true; > u64 hqd_gpu_addr; > u64 mqd_gpu_addr; > u64 eop_gpu_addr; > @@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) > > /* enable doorbell? */ > tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); > - if (use_doorbell) { > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); > - } else { > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0); > - } > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); > WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp); > mqd->cp_hqd_pq_doorbell_control = tmp; > > @@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) > mqd->cp_hqd_pq_wptr_poll_addr_hi); > > /* enable the doorbell if requested */ > - if (use_doorbell) { > - if ((adev->asic_type == CHIP_CARRIZO) || > - (adev->asic_type == CHIP_FIJI) || > - (adev->asic_type == CHIP_STONEY) || > - (adev->asic_type == CHIP_POLARIS11) || > - (adev->asic_type == CHIP_POLARIS10) || > - (adev->asic_type == CHIP_POLARIS12)) { > - WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, > - AMDGPU_DOORBELL_KIQ << 2); > - WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, > - AMDGPU_DOORBELL_MEC_RING7 << 2); > - } > - tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, > - DOORBELL_OFFSET, ring->doorbell_index); > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); > - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); > - mqd->cp_hqd_pq_doorbell_control = tmp; > - > - } else { > - mqd->cp_hqd_pq_doorbell_control = 0; > + if ((adev->asic_type == CHIP_CARRIZO) || > + (adev->asic_type == CHIP_FIJI) || > + (adev->asic_type == CHIP_STONEY) || > + (adev->asic_type == CHIP_POLARIS11) || > + (adev->asic_type == CHIP_POLARIS10) || > + (adev->asic_type == CHIP_POLARIS12)) { > + WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); > + WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2); > } > + tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, > + DOORBELL_OFFSET, ring->doorbell_index); > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); > + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); > + mqd->cp_hqd_pq_doorbell_control = tmp; > + > WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, > mqd->cp_hqd_pq_doorbell_control); > > @@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) > amdgpu_bo_unreserve(ring->mqd_obj); > } > > - if (use_doorbell) { > - tmp = RREG32(mmCP_PQ_STATUS); > - tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1); > - WREG32(mmCP_PQ_STATUS, tmp); > - } > + tmp = RREG32(mmCP_PQ_STATUS); > + tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1); > + WREG32(mmCP_PQ_STATUS, tmp); > > gfx_v8_0_cp_compute_enable(adev, true); > > -- > 2.5.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
On 2017-05-09 08:53 AM, Alex Deucher wrote: > On Mon, May 8, 2017 at 1:01 PM, Gustavo A. R. Silva > <garsilva@embeddedor.com> wrote: >> Local variable use_doorbell is assigned to a constant value and it is never >> updated again. Remove this variable and the dead code it guards. >> >> Addresses-Coverity-ID: 1401828 >> Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> > > This code is already removed in the latest code queued for the next > kernel for gfx8. For gfx7, I think Andres' priority patch set fixes > this up for gfx7. Yeah, on gfx7 it should use ring->use_doorbell instead of the hard-coded local variable. Andres > > Alex > >> --- >> drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++---------------------- >> 1 file changed, 20 insertions(+), 33 deletions(-) >> >> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >> index 67afc90..e824c2b 100644 >> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c >> @@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) >> { >> int r, i, j; >> u32 tmp; >> - bool use_doorbell = true; >> u64 hqd_gpu_addr; >> u64 mqd_gpu_addr; >> u64 eop_gpu_addr; >> @@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) >> >> /* enable doorbell? */ >> tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); >> - if (use_doorbell) { >> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); >> - } else { >> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0); >> - } >> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); >> WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp); >> mqd->cp_hqd_pq_doorbell_control = tmp; >> >> @@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) >> mqd->cp_hqd_pq_wptr_poll_addr_hi); >> >> /* enable the doorbell if requested */ >> - if (use_doorbell) { >> - if ((adev->asic_type == CHIP_CARRIZO) || >> - (adev->asic_type == CHIP_FIJI) || >> - (adev->asic_type == CHIP_STONEY) || >> - (adev->asic_type == CHIP_POLARIS11) || >> - (adev->asic_type == CHIP_POLARIS10) || >> - (adev->asic_type == CHIP_POLARIS12)) { >> - WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, >> - AMDGPU_DOORBELL_KIQ << 2); >> - WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, >> - AMDGPU_DOORBELL_MEC_RING7 << 2); >> - } >> - tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); >> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, >> - DOORBELL_OFFSET, ring->doorbell_index); >> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); >> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); >> - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); >> - mqd->cp_hqd_pq_doorbell_control = tmp; >> - >> - } else { >> - mqd->cp_hqd_pq_doorbell_control = 0; >> + if ((adev->asic_type == CHIP_CARRIZO) || >> + (adev->asic_type == CHIP_FIJI) || >> + (adev->asic_type == CHIP_STONEY) || >> + (adev->asic_type == CHIP_POLARIS11) || >> + (adev->asic_type == CHIP_POLARIS10) || >> + (adev->asic_type == CHIP_POLARIS12)) { >> + WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); >> + WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2); >> } >> + tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); >> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, >> + DOORBELL_OFFSET, ring->doorbell_index); >> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); >> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); >> + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); >> + mqd->cp_hqd_pq_doorbell_control = tmp; >> + >> WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, >> mqd->cp_hqd_pq_doorbell_control); >> >> @@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) >> amdgpu_bo_unreserve(ring->mqd_obj); >> } >> >> - if (use_doorbell) { >> - tmp = RREG32(mmCP_PQ_STATUS); >> - tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1); >> - WREG32(mmCP_PQ_STATUS, tmp); >> - } >> + tmp = RREG32(mmCP_PQ_STATUS); >> + tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1); >> + WREG32(mmCP_PQ_STATUS, tmp); >> >> gfx_v8_0_cp_compute_enable(adev, true); >> >> -- >> 2.5.0 >> >> _______________________________________________ >> amd-gfx mailing list >> amd-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel >
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c index 67afc90..e824c2b 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c @@ -4991,7 +4991,6 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) { int r, i, j; u32 tmp; - bool use_doorbell = true; u64 hqd_gpu_addr; u64 mqd_gpu_addr; u64 eop_gpu_addr; @@ -5079,11 +5078,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) /* enable doorbell? */ tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); - if (use_doorbell) { - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); - } else { - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 0); - } + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, tmp); mqd->cp_hqd_pq_doorbell_control = tmp; @@ -5157,29 +5152,23 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) mqd->cp_hqd_pq_wptr_poll_addr_hi); /* enable the doorbell if requested */ - if (use_doorbell) { - if ((adev->asic_type == CHIP_CARRIZO) || - (adev->asic_type == CHIP_FIJI) || - (adev->asic_type == CHIP_STONEY) || - (adev->asic_type == CHIP_POLARIS11) || - (adev->asic_type == CHIP_POLARIS10) || - (adev->asic_type == CHIP_POLARIS12)) { - WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, - AMDGPU_DOORBELL_KIQ << 2); - WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, - AMDGPU_DOORBELL_MEC_RING7 << 2); - } - tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, - DOORBELL_OFFSET, ring->doorbell_index); - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); - tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); - mqd->cp_hqd_pq_doorbell_control = tmp; - - } else { - mqd->cp_hqd_pq_doorbell_control = 0; + if ((adev->asic_type == CHIP_CARRIZO) || + (adev->asic_type == CHIP_FIJI) || + (adev->asic_type == CHIP_STONEY) || + (adev->asic_type == CHIP_POLARIS11) || + (adev->asic_type == CHIP_POLARIS10) || + (adev->asic_type == CHIP_POLARIS12)) { + WREG32(mmCP_MEC_DOORBELL_RANGE_LOWER, AMDGPU_DOORBELL_KIQ << 2); + WREG32(mmCP_MEC_DOORBELL_RANGE_UPPER, AMDGPU_DOORBELL_MEC_RING7 << 2); } + tmp = RREG32(mmCP_HQD_PQ_DOORBELL_CONTROL); + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, + DOORBELL_OFFSET, ring->doorbell_index); + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_EN, 1); + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_SOURCE, 0); + tmp = REG_SET_FIELD(tmp, CP_HQD_PQ_DOORBELL_CONTROL, DOORBELL_HIT, 0); + mqd->cp_hqd_pq_doorbell_control = tmp; + WREG32(mmCP_HQD_PQ_DOORBELL_CONTROL, mqd->cp_hqd_pq_doorbell_control); @@ -5217,11 +5206,9 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) amdgpu_bo_unreserve(ring->mqd_obj); } - if (use_doorbell) { - tmp = RREG32(mmCP_PQ_STATUS); - tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1); - WREG32(mmCP_PQ_STATUS, tmp); - } + tmp = RREG32(mmCP_PQ_STATUS); + tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1); + WREG32(mmCP_PQ_STATUS, tmp); gfx_v8_0_cp_compute_enable(adev, true);
Local variable use_doorbell is assigned to a constant value and it is never updated again. Remove this variable and the dead code it guards. Addresses-Coverity-ID: 1401828 Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> --- drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 53 +++++++++++++---------------------- 1 file changed, 20 insertions(+), 33 deletions(-)