From patchwork Thu Jun 22 16:48:12 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Logan Gunthorpe X-Patchwork-Id: 9805479 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id DE13F60329 for ; Fri, 23 Jun 2017 01:05:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E433C1FFEB for ; Fri, 23 Jun 2017 01:05:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D888E28405; Fri, 23 Jun 2017 01:05:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3B38A1FFEB for ; Fri, 23 Jun 2017 01:05:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 7FBDD6E727; Fri, 23 Jun 2017 01:04:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from ale.deltatee.com (ale.deltatee.com [207.54.116.67]) by gabe.freedesktop.org (Postfix) with ESMTPS id E5BCF6E695 for ; Thu, 22 Jun 2017 16:49:23 +0000 (UTC) Received: from cgy1-donard.priv.deltatee.com ([172.16.1.31]) by ale.deltatee.com with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84_2) (envelope-from ) id 1dO5IA-0006MT-9J; Thu, 22 Jun 2017 10:49:15 -0600 Received: from gunthorp by cgy1-donard.priv.deltatee.com with local (Exim 4.84_2) (envelope-from ) id 1dO5IA-0006eT-A4; Thu, 22 Jun 2017 10:49:14 -0600 From: Logan Gunthorpe To: linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-ntb@googlegroups.com, linux-alpha@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org Date: Thu, 22 Jun 2017 10:48:12 -0600 Message-Id: <20170622164817.25515-3-logang@deltatee.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170622164817.25515-1-logang@deltatee.com> References: <20170622164817.25515-1-logang@deltatee.com> X-SA-Exim-Connect-IP: 172.16.1.31 X-SA-Exim-Rcpt-To: linux-ntb@googlegroups.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, linux-arch@vger.kernel.org, linux-alpha@vger.kernel.org, linux-crypto@vger.kernel.org, dri-devel@lists.freedesktop.org, arnd@arndb.de, gregkh@linuxfoundation.org, sbates@raithlin.com, logang@deltatee.com, benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, warrier@linux.vnet.ibm.com, npiggin@gmail.com X-SA-Exim-Mail-From: gunthorp@deltatee.com Subject: [PATCH 2/7] iomap: implement ioread64 and iowrite64 X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on ale.deltatee.com) X-Mailman-Approved-At: Fri, 23 Jun 2017 01:03:45 +0000 Cc: Arnd Bergmann , Greg Kroah-Hartman , Nicholas Piggin , Stephen Bates , Paul Mackerras , Michael Ellerman , Suresh Warrier , Logan Gunthorpe X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Currently, ioread64 and iowrite64 are not impleminted in the generic iomap implementation. The prototypes are defined if CONFIG_64BIT is set but there is no actual implementation. Seeing the functions are not universally available, they are unusable for driver developers. This leads to ugly hacks such as those at the top of drivers/ntb/hw/intel/ntb_hw_intel.c This patch adds generic implementations for these functions. We add the obvious version if readq/writeq are implemented and fall back to using two io32 calls in cases that don't provide direct 64bit accesses. Thus making the functions universally available to configurations with CONFIG_GENERIC_IOMAP=y. For any pio accesses, the 64bit operations remain unsupported and simply call bad_io_access in cases readq would be called. Signed-off-by: Logan Gunthorpe Cc: Benjamin Herrenschmidt Cc: Paul Mackerras Cc: Michael Ellerman Cc: Arnd Bergmann Cc: Suresh Warrier Cc: Nicholas Piggin --- arch/powerpc/include/asm/io.h | 2 ++ include/asm-generic/iomap.h | 4 --- lib/iomap.c | 62 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 64 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h index 422f99cf9924..11a83667d2c3 100644 --- a/arch/powerpc/include/asm/io.h +++ b/arch/powerpc/include/asm/io.h @@ -788,8 +788,10 @@ extern void __iounmap_at(void *ea, unsigned long size); #define mmio_read16be(addr) readw_be(addr) #define mmio_read32be(addr) readl_be(addr) +#define mmio_read64be(addr) readq_be(addr) #define mmio_write16be(val, addr) writew_be(val, addr) #define mmio_write32be(val, addr) writel_be(val, addr) +#define mmio_write64be(val, addr) writeq_be(val, addr) #define mmio_insb(addr, dst, count) readsb(addr, dst, count) #define mmio_insw(addr, dst, count) readsw(addr, dst, count) #define mmio_insl(addr, dst, count) readsl(addr, dst, count) diff --git a/include/asm-generic/iomap.h b/include/asm-generic/iomap.h index 650fede33c25..43ec4ea9f6f9 100644 --- a/include/asm-generic/iomap.h +++ b/include/asm-generic/iomap.h @@ -30,20 +30,16 @@ extern unsigned int ioread16(void __iomem *); extern unsigned int ioread16be(void __iomem *); extern unsigned int ioread32(void __iomem *); extern unsigned int ioread32be(void __iomem *); -#ifdef CONFIG_64BIT extern u64 ioread64(void __iomem *); extern u64 ioread64be(void __iomem *); -#endif extern void iowrite8(u8, void __iomem *); extern void iowrite16(u16, void __iomem *); extern void iowrite16be(u16, void __iomem *); extern void iowrite32(u32, void __iomem *); extern void iowrite32be(u32, void __iomem *); -#ifdef CONFIG_64BIT extern void iowrite64(u64, void __iomem *); extern void iowrite64be(u64, void __iomem *); -#endif /* * "string" versions of the above. Note that they diff --git a/lib/iomap.c b/lib/iomap.c index fc3dcb4b238e..e38e036cb52f 100644 --- a/lib/iomap.c +++ b/lib/iomap.c @@ -66,6 +66,7 @@ static void bad_io_access(unsigned long port, const char *access) #ifndef mmio_read16be #define mmio_read16be(addr) be16_to_cpu(__raw_readw(addr)) #define mmio_read32be(addr) be32_to_cpu(__raw_readl(addr)) +#define mmio_read64be(addr) be64_to_cpu(__raw_readq(addr)) #endif unsigned int ioread8(void __iomem *addr) @@ -93,11 +94,45 @@ unsigned int ioread32be(void __iomem *addr) IO_COND(addr, return pio_read32be(port), return mmio_read32be(addr)); return 0xffffffff; } + +#ifdef readq +u64 ioread64(void __iomem *addr) +{ + IO_COND(addr, bad_io_access(port, "ioread64"), return readq(addr)); + return 0xffffffffffffffffLL; +} +u64 ioread64be(void __iomem *addr) +{ + IO_COND(addr, bad_io_access(port, "ioread64be"), + return mmio_read64be(addr)); + return 0xffffffffffffffffLL; +} +#else +u64 ioread64(void __iomem *addr) +{ + u64 low, high; + + low = ioread32(addr); + high = ioread32(addr + sizeof(u32)); + return low | (high << 32); +} +u64 ioread64be(void __iomem *addr) +{ + u64 low, high; + + low = ioread32be(addr + sizeof(u32)); + high = ioread32be(addr); + return low | (high << 32); +} +#endif + EXPORT_SYMBOL(ioread8); EXPORT_SYMBOL(ioread16); EXPORT_SYMBOL(ioread16be); EXPORT_SYMBOL(ioread32); EXPORT_SYMBOL(ioread32be); +EXPORT_SYMBOL(ioread64); +EXPORT_SYMBOL(ioread64be); #ifndef pio_write16be #define pio_write16be(val,port) outw(swab16(val),port) @@ -107,6 +142,7 @@ EXPORT_SYMBOL(ioread32be); #ifndef mmio_write16be #define mmio_write16be(val,port) __raw_writew(be16_to_cpu(val),port) #define mmio_write32be(val,port) __raw_writel(be32_to_cpu(val),port) +#define mmio_write64be(val,port) __raw_writeq(be64_to_cpu(val),port) #endif void iowrite8(u8 val, void __iomem *addr) @@ -129,11 +165,37 @@ void iowrite32be(u32 val, void __iomem *addr) { IO_COND(addr, pio_write32be(val,port), mmio_write32be(val, addr)); } + +#ifdef writeq +void iowrite64(u64 val, void __iomem *addr) +{ + IO_COND(addr, bad_io_access(port, "iowrite64"), writeq(val, addr)); +} +void iowrite64be(u64 val, void __iomem *addr) +{ + IO_COND(addr, bad_io_access(port, "iowrite64be"), + mmio_write64be(val, addr)); +} +#else +void iowrite64(u64 val, void __iomem *addr) +{ + iowrite32(val, addr); + iowrite32(val >> 32, addr + sizeof(u32)); +} +void iowrite64be(u64 val, void __iomem *addr) +{ + iowrite32be(val >> 32, addr); + iowrite32be(val, addr + sizeof(u32)); +} +#endif + EXPORT_SYMBOL(iowrite8); EXPORT_SYMBOL(iowrite16); EXPORT_SYMBOL(iowrite16be); EXPORT_SYMBOL(iowrite32); EXPORT_SYMBOL(iowrite32be); +EXPORT_SYMBOL(iowrite64); +EXPORT_SYMBOL(iowrite64be); /* * These are the "repeat MMIO read/write" functions.