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[91.114.193.248]) by smtp.gmail.com with ESMTPSA id z192sm2544673wmz.44.2017.07.22.02.55.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sat, 22 Jul 2017 02:55:21 -0700 (PDT) From: Christian Gmeiner To: dri-devel@lists.freedesktop.org Subject: [PATCH V2 13/23] drm/etnaviv: add HI perf domain Date: Sat, 22 Jul 2017 11:53:13 +0200 Message-Id: <20170722095323.9964-14-christian.gmeiner@gmail.com> X-Mailer: git-send-email 2.13.3 In-Reply-To: <20170722095323.9964-1-christian.gmeiner@gmail.com> References: <20170722095323.9964-1-christian.gmeiner@gmail.com> Cc: linux+etnaviv@armlinux.org.uk, etnaviv@lists.freedesktop.org, cphealy@gmail.com X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Christian Gmeiner --- drivers/gpu/drm/etnaviv/etnaviv_perfmon.c | 55 +++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) diff --git a/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c b/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c index 41e12f2a1dbd..212e1cee61fa 100644 --- a/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c +++ b/drivers/gpu/drm/etnaviv/etnaviv_perfmon.c @@ -17,6 +17,7 @@ #include "etnaviv_gpu.h" #include "etnaviv_perfmon.h" +#include "state_hi.xml.h" struct etnaviv_pm_domain; @@ -31,11 +32,65 @@ struct etnaviv_pm_signal { struct etnaviv_pm_domain { char name[64]; + + /* profile register */ + u32 profile_read; + u32 profile_config; + u8 nr_signals; const struct etnaviv_pm_signal *signal; }; +static u32 simple_reg_read(struct etnaviv_gpu *gpu, + const struct etnaviv_pm_domain *domain, + const struct etnaviv_pm_signal *signal) +{ + return gpu_read(gpu, signal->data); +} + +static u32 perf_reg_read(struct etnaviv_gpu *gpu, + const struct etnaviv_pm_domain *domain, + const struct etnaviv_pm_signal *signal) +{ + gpu_write(gpu, domain->profile_config, signal->data); + + return gpu_read(gpu, domain->profile_read); +} + static const struct etnaviv_pm_domain doms[] = { + { + .name = "HI", + .profile_read = VIVS_MC_PROFILE_HI_READ, + .profile_config = VIVS_MC_PROFILE_CONFIG2, + .nr_signals = 5, + .signal = (const struct etnaviv_pm_signal[]) { + { + "TOTAL_CYCLES", + VIVS_HI_PROFILE_TOTAL_CYCLES, + &simple_reg_read + }, + { + "IDLE_CYCLES", + VIVS_HI_PROFILE_IDLE_CYCLES, + &simple_reg_read + }, + { + "AXI_CYCLES_READ_REQUEST_STALLED", + VIVS_MC_PROFILE_CONFIG2_HI_AXI_CYCLES_READ_REQUEST_STALLED, + &perf_reg_read + }, + { + "AXI_CYCLES_WRITE_REQUEST_STALLED", + VIVS_MC_PROFILE_CONFIG2_HI_AXI_CYCLES_WRITE_REQUEST_STALLED, + &perf_reg_read + }, + { + "AXI_CYCLES_WRITE_DATA_STALLED", + VIVS_MC_PROFILE_CONFIG2_HI_AXI_CYCLES_WRITE_DATA_STALLED, + &perf_reg_read + } + } + } }; int etnaviv_pm_query_dom(struct etnaviv_gpu *gpu,