From patchwork Fri Oct 20 13:12:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Ujfalusi X-Patchwork-Id: 10020215 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 4AE9660211 for ; Fri, 20 Oct 2017 13:12:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 392BA28DBB for ; Fri, 20 Oct 2017 13:12:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2E11A28EE2; Fri, 20 Oct 2017 13:12:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CCD2528DBB for ; Fri, 20 Oct 2017 13:12:47 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EA1196E165; Fri, 20 Oct 2017 13:12:46 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77]) by gabe.freedesktop.org (Postfix) with ESMTPS id D6D2F6E165 for ; Fri, 20 Oct 2017 13:12:45 +0000 (UTC) Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v9KDCgcB024728; Fri, 20 Oct 2017 08:12:42 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1508505162; bh=e9q8DGgBSxuRsVwcuAdEsE25WruHdwRZP2EEItUtqVk=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=yUBlPd0znIQlHGhp6DO0fM9uJj5uUq6EwBTEIUNZfVFWBx2j7vxcnNhiyCrRcwfSs mZsbVFaeNUpEdo8+6biDa825TXsdxmc+MdY9XGI17bhnv2RdtmRIqYyIF4JJV8ERIZ uCLRVSrQHl0CstdeAAvcQqT46zLuUX51WGED0pfk= Received: from DLEE101.ent.ti.com (dlee101.ent.ti.com [157.170.170.31]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9KDCgDM026014; Fri, 20 Oct 2017 08:12:42 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34; Fri, 20 Oct 2017 08:12:42 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend Transport; Fri, 20 Oct 2017 08:12:42 -0500 Received: from feketebors.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v9KDCYZY031675; Fri, 20 Oct 2017 08:12:40 -0500 From: Peter Ujfalusi To: , Subject: [PATCH 3/3] drm/omap: Filter displays mode based on bandwidth limit Date: Fri, 20 Oct 2017 16:12:58 +0300 Message-ID: <20171020131258.4092-4-peter.ujfalusi@ti.com> X-Mailer: git-send-email 2.14.2 In-Reply-To: <20171020131258.4092-1-peter.ujfalusi@ti.com> References: <20171020131258.4092-1-peter.ujfalusi@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Cc: devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP If we have memory bandwidth limit configured, reject the modes which would require more bandwidth than the limit if it is used with one full resolution plane (most common use case). This filtering is not providing full protection as it is possible that application would pick smaller crtc resolution with high resolution planes and down scaling, or can enable more smaller planes where the sum of their bandwidth need would be higher than the limit. This patch only allows us to filter out modes which would need more bandwidth if they were used with one full screen plane. Signed-off-by: Peter Ujfalusi --- drivers/gpu/drm/omapdrm/omap_connector.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/omapdrm/omap_drv.c | 5 +++++ drivers/gpu/drm/omapdrm/omap_drv.h | 3 +++ 3 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c index aa5ba9ae2191..c693d22960c8 100644 --- a/drivers/gpu/drm/omapdrm/omap_connector.c +++ b/drivers/gpu/drm/omapdrm/omap_connector.c @@ -159,6 +159,7 @@ static int omap_connector_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { struct omap_connector *omap_connector = to_omap_connector(connector); + struct omap_drm_private *priv = connector->dev->dev_private; struct omap_dss_device *dssdev = omap_connector->dssdev; struct omap_dss_driver *dssdrv = dssdev->driver; struct videomode vm = {0}; @@ -203,6 +204,29 @@ static int omap_connector_mode_valid(struct drm_connector *connector, drm_mode_destroy(dev, new_mode); } + /* Check for bandwidth limit */ + if (!r && priv->max_bandwidth) { + unsigned int bandwidth, real_refresh; + + /* + * Estimation for the bandwidth need of a given mode with one + * full screen plane: + * resolution * 32bpp * (real) refresh rate + */ + real_refresh = drm_mode_vrefresh(mode); + if (mode->flags & DRM_MODE_FLAG_INTERLACE) + real_refresh /= 2; + + bandwidth = vm.hactive * vm.vactive * 4 * real_refresh; + + /* + * Reject modes which would need more bandwidth if used with one + * full resolution plane (most common use case). + */ + if (priv->max_bandwidth < bandwidth) + ret = MODE_BAD; + } + DBG("connector: mode %s: " "%d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x", (ret == MODE_OK) ? "valid" : "invalid", diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c index 528cf5c25bec..58b4a0e149e0 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.c +++ b/drivers/gpu/drm/omapdrm/omap_drv.c @@ -701,6 +701,11 @@ static int pdev_probe(struct platform_device *pdev) spin_lock_init(&priv->list_lock); INIT_LIST_HEAD(&priv->obj_list); + /* Get memory bandwidth limits */ + if (priv->dispc_ops->get_memory_bandwidth_limit) + priv->max_bandwidth = + priv->dispc_ops->get_memory_bandwidth_limit(); + omap_gem_init(ddev); ret = omap_modeset_init(ddev); diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h index cccaae787a7c..d49715272080 100644 --- a/drivers/gpu/drm/omapdrm/omap_drv.h +++ b/drivers/gpu/drm/omapdrm/omap_drv.h @@ -86,6 +86,9 @@ struct omap_drm_private { spinlock_t wait_lock; /* protects the wait_list */ struct list_head wait_list; /* list of omap_irq_wait */ uint32_t irq_mask; /* enabled irqs in addition to wait_list */ + + /* memory bandwidth limit if it is needed on the platform */ + unsigned int max_bandwidth; };