| Message ID | 20171101141419.3180-1-Liviu.Dudau@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Hi Liviu, Thank you for the patch. On Wednesday, 1 November 2017 16:14:19 EET Liviu Dudau wrote: > drm_gem_cma_prime_import_sg_table() will fail if the number of entries > in the sg_table > 1. However, you can have a device that uses an IOMMU > engine and can map a discontiguous buffer with multiple entries that > have consecutive sg_dma_addresses, effectively making it contiguous. > Allow for that scenario by testing the entries in the sg_table for > contiguous coverage. > > Reviewed-by: Brian Starkey <brian.starkey@arm.com> > Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> > --- > > Hi, > > This patch is the only change I need in order to be able to use existing > IOMMU domain infrastructure with the Mali DP driver. I have tested the > patch and I know it works correctly for my setup, but I would like to get > some comments on whether I am on the right path or if CMA really wants to > see an sg_table with only one entry. CMA, as the memory allocator, doesn't care as it doesn't even see the sg table. The drm_gem_cma_helper is badly named as it doesn't depend on CMA, it should have been called drm_gem_dma_contig_helper or something similar. The assumption at the base of that helper library is that the memory is DMA contiguous. Your patch guarantees that, so it should be fine. I've quickly checked the drivers using drm_gem_cma_prime_import_sg_table and none of them use cma_obj->sgt, so I think there's no risk of breakage. However, I would prefer if you updated the drm_gem_cma_object structure documentation to explicitly state that the sgt can contain multiple entries but that those entries are guaranteed to have contiguous DMA addresses. With the documentation update, Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > drivers/gpu/drm/drm_gem_cma_helper.c | 22 ++++++++++++++++++++-- > 1 file changed, 20 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c > b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d > 100644 > --- a/drivers/gpu/drm/drm_gem_cma_helper.c > +++ b/drivers/gpu/drm/drm_gem_cma_helper.c > @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device > *dev, { > struct drm_gem_cma_object *cma_obj; > > - if (sgt->nents != 1) > - return ERR_PTR(-EINVAL); > + if (sgt->nents != 1) { > + /* check if the entries in the sg_table are contiguous */ > + dma_addr_t next_addr = sg_dma_address(sgt->sgl); > + struct scatterlist *s; > + unsigned int i; > + > + for_each_sg(sgt->sgl, s, sgt->nents, i) { > + /* > + * sg_dma_address(s) is only valid for entries > + * that have sg_dma_len(s) != 0 > + */ > + if (!sg_dma_len(s)) > + continue; > + > + if (sg_dma_address(s) != next_addr) > + return ERR_PTR(-EINVAL); > + > + next_addr = sg_dma_address(s) + sg_dma_len(s); > + } > + } > > /* Create a CMA GEM buffer. */ > cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size);
diff --git a/drivers/gpu/drm/drm_gem_cma_helper.c b/drivers/gpu/drm/drm_gem_cma_helper.c index 020e7668dfaba..43b179212052d 100644 --- a/drivers/gpu/drm/drm_gem_cma_helper.c +++ b/drivers/gpu/drm/drm_gem_cma_helper.c @@ -482,8 +482,26 @@ drm_gem_cma_prime_import_sg_table(struct drm_device *dev, { struct drm_gem_cma_object *cma_obj; - if (sgt->nents != 1) - return ERR_PTR(-EINVAL); + if (sgt->nents != 1) { + /* check if the entries in the sg_table are contiguous */ + dma_addr_t next_addr = sg_dma_address(sgt->sgl); + struct scatterlist *s; + unsigned int i; + + for_each_sg(sgt->sgl, s, sgt->nents, i) { + /* + * sg_dma_address(s) is only valid for entries + * that have sg_dma_len(s) != 0 + */ + if (!sg_dma_len(s)) + continue; + + if (sg_dma_address(s) != next_addr) + return ERR_PTR(-EINVAL); + + next_addr = sg_dma_address(s) + sg_dma_len(s); + } + } /* Create a CMA GEM buffer. */ cma_obj = __drm_gem_cma_create(dev, attach->dmabuf->size);