From patchwork Tue Jan 30 20:29:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Escande X-Patchwork-Id: 10193489 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7AD3660383 for ; Wed, 31 Jan 2018 08:34:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6958D26CFC for ; Wed, 31 Jan 2018 08:34:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5E2182843C; Wed, 31 Jan 2018 08:34:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id CF06E26CFC for ; Wed, 31 Jan 2018 08:34:56 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F38C46EB61; Wed, 31 Jan 2018 08:33:27 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by gabe.freedesktop.org (Postfix) with ESMTPS id B3A906EB1C for ; Tue, 30 Jan 2018 20:30:04 +0000 (UTC) Received: from localhost.localdomain (unknown [IPv6:2a01:e35:8a7e:4790:1865:5d14:35de:d167]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tescande) by bhuna.collabora.co.uk (Postfix) with ESMTPSA id 42DAB27425E; Tue, 30 Jan 2018 20:30:02 +0000 (GMT) From: Thierry Escande To: Archit Taneja , Inki Dae , Thierry Reding , Sandy Huang , Sean Paul , David Airlie , Tomasz Figa , Enric Balletbo i Serra Subject: [PATCH v3 39/43] drm/rockchip: psr: Avoid redundant calls to .set() callback Date: Tue, 30 Jan 2018 21:29:09 +0100 Message-Id: <20180130202913.28724-40-thierry.escande@collabora.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180130202913.28724-1-thierry.escande@collabora.com> References: <20180130202913.28724-1-thierry.escande@collabora.com> MIME-Version: 1.0 Content-Transfert-Encoding: 8bit X-Mailman-Approved-At: Wed, 31 Jan 2018 08:33:12 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Zain Wang , Lin Huang , Douglas Anderson , dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Yakir Yang , =?UTF-8?q?=C3=98rjan=20Eide?= , Mark Yao , Haixia Shi Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Tomasz Figa The first time after we call rockchip_drm_do_flush() after rockchip_drm_psr_register(), we go from PSR_DISABLE to PSR_FLUSH. The difference between PSR_DISABLE and PSR_FLUSH is whether or not we have a delayed work pending - PSR is off in either state. However psr_set_state() only catches the transition from PSR_FLUSH to PSR_DISABLE (which never happens), while going from PSR_DISABLE to PSR_FLUSH triggers a call to psr->set() to disable PSR while it's already disabled. This triggers the eDP PHY power-on sequence without being shut down first and this seems to occasionally leave the encoder unable to later enable PSR. Let's just simplify the state machine and simply consider PSR_DISABLE and PSR_FLUSH the same state. This lets us represent the hardware state by a simple boolean called "enabled" and, while at it, rename the misleading "active" boolean to "inhibit", which represents the purpose much better. Also, userspace can (and does) trigger the rockchip_drm_do_flush() path from drmModeDirtyFB() at any time, whether or the encoder is active. If no mode is set, we call into analogix_dp_psr_set() which returns -EINVAL because encoder->crtc is NULL. Avoid this by starting out with psr->allowed set to false. Signed-off-by: Kristian H. Kristensen Signed-off-by: Tomasz Figa Signed-off-by: Thierry Escande --- drivers/gpu/drm/rockchip/rockchip_drm_psr.c | 79 +++++++++-------------------- 1 file changed, 23 insertions(+), 56 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c index c8655e625ba2..448c5fde241c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_psr.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_psr.c @@ -22,19 +22,13 @@ #define PSR_FLUSH_TIMEOUT_MS 100 -enum psr_state { - PSR_FLUSH, - PSR_ENABLE, - PSR_DISABLE, -}; - struct psr_drv { struct list_head list; struct drm_encoder *encoder; struct mutex lock; bool active; - enum psr_state state; + bool enabled; struct delayed_work flush_work; struct work_struct disable_work; @@ -78,52 +72,22 @@ static struct psr_drv *find_psr_by_encoder(struct drm_encoder *encoder) return psr; } -static void psr_set_state_locked(struct psr_drv *psr, enum psr_state state) +static int psr_set_state_locked(struct psr_drv *psr, bool enable) { - /* - * Allowed finite state machine: - * - * PSR_ENABLE < = = = = = > PSR_FLUSH - * | ^ | - * | | | - * v | | - * PSR_DISABLE < - - - - - - - - - - */ - if (state == psr->state || !psr->active) - return; - - /* Already disabled in flush, change the state, but not the hardware */ - if (state == PSR_DISABLE && psr->state == PSR_FLUSH) { - psr->state = state; - return; - } + int ret; - /* Actually commit the state change to hardware */ - switch (state) { - case PSR_ENABLE: - if (psr->set(psr->encoder, true)) - return; - break; - - case PSR_DISABLE: - case PSR_FLUSH: - if (psr->set(psr->encoder, false)) - return; - break; - - default: - pr_err("%s: Unknown state %d\n", __func__, state); - return; - } + if (!psr->active) + return -EINVAL; - psr->state = state; -} + if (enable == psr->enabled) + return 0; -static void psr_set_state(struct psr_drv *psr, enum psr_state state) -{ - mutex_lock(&psr->lock); - psr_set_state_locked(psr, state); - mutex_unlock(&psr->lock); + ret = psr->set(psr->encoder, enable); + if (ret) + return ret; + + psr->enabled = enable; + return 0; } static void psr_flush_handler(struct work_struct *work) @@ -131,10 +95,8 @@ static void psr_flush_handler(struct work_struct *work) struct psr_drv *psr = container_of(to_delayed_work(work), struct psr_drv, flush_work); - /* If the state has changed since we initiated the flush, do nothing */ mutex_lock(&psr->lock); - if (psr->state == PSR_FLUSH) - psr_set_state_locked(psr, PSR_ENABLE); + psr_set_state_locked(psr, true); mutex_unlock(&psr->lock); } @@ -176,6 +138,7 @@ int rockchip_drm_psr_deactivate(struct drm_encoder *encoder) mutex_lock(&psr->lock); psr->active = false; + psr->enabled = false; mutex_unlock(&psr->lock); cancel_delayed_work_sync(&psr->flush_work); cancel_work_sync(&psr->disable_work); @@ -187,8 +150,12 @@ EXPORT_SYMBOL(rockchip_drm_psr_deactivate); static void rockchip_drm_do_flush(struct psr_drv *psr) { cancel_delayed_work_sync(&psr->flush_work); - psr_set_state(psr, PSR_FLUSH); - mod_delayed_work(system_wq, &psr->flush_work, PSR_FLUSH_TIMEOUT_MS); + + mutex_lock(&psr->lock); + if (!psr_set_state_locked(psr, false)) + mod_delayed_work(system_wq, &psr->flush_work, + PSR_FLUSH_TIMEOUT_MS); + mutex_unlock(&psr->lock); } /** @@ -355,8 +322,8 @@ int rockchip_drm_psr_register(struct drm_encoder *encoder, INIT_WORK(&psr->disable_work, psr_disable_handler); mutex_init(&psr->lock); - psr->active = true; - psr->state = PSR_DISABLE; + psr->active = false; + psr->enabled = false; psr->encoder = encoder; psr->set = psr_set;