From patchwork Thu Feb 8 18:30:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sebastian Reichel X-Patchwork-Id: 10208413 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7FF0960247 for ; Fri, 9 Feb 2018 08:27:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 702E7297CA for ; Fri, 9 Feb 2018 08:27:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 64638297D0; Fri, 9 Feb 2018 08:27:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0AA52297CA for ; Fri, 9 Feb 2018 08:27:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A9C86E771; Fri, 9 Feb 2018 08:26:26 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6DA506E68C for ; Thu, 8 Feb 2018 18:31:07 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: sre) with ESMTPSA id F1FDE272779 From: Sebastian Reichel To: Sebastian Reichel , Tomi Valkeinen , Tony Lindgren Subject: [PATCHv2 8/8] drm/omap: plane: update fifo size on ovl setup Date: Thu, 8 Feb 2018 19:30:35 +0100 Message-Id: <20180208183035.8461-9-sebastian.reichel@collabora.co.uk> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180208183035.8461-1-sebastian.reichel@collabora.co.uk> References: <20180208183035.8461-1-sebastian.reichel@collabora.co.uk> X-Mailman-Approved-At: Fri, 09 Feb 2018 08:26:16 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, kernel@collabora.com, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Hans de Goede , Rob Herring , Laurent Pinchart , Sebastian Reichel , linux-omap@vger.kernel.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP This is a workaround for a hardware bug occuring on OMAP3 with manually updated panels. Details about the HW bug are unknown to me, but without this fix the panel refresh does not work at all on Nokia N950. This is not the case for the OMAP4 based Droid 4, which works perfectly fine with default settings. Signed-off-by: Sebastian Reichel --- drivers/gpu/drm/omapdrm/dss/dispc.c | 36 +++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 4e8f68efd169..0904c3201914 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -157,6 +157,8 @@ struct dispc_features { bool has_gamma_table:1; bool has_gamma_i734_bug:1; + + bool has_fifo_stallmode_bug:1; }; #define DISPC_MAX_NR_FIFOS 5 @@ -1489,6 +1491,18 @@ void dispc_ovl_compute_fifo_thresholds(enum omap_plane_id plane, } } +static void dispc_ovl_set_manual_fifo_threshold(enum omap_plane_id plane) +{ + u32 fifo_low, fifo_high; + bool use_fifo_merge = false; + bool use_manual_update = true; + + dispc_ovl_compute_fifo_thresholds(plane, &fifo_low, &fifo_high, + use_fifo_merge, use_manual_update); + + dispc_ovl_set_fifo_threshold(plane, fifo_low, fifo_high); +} + static void dispc_ovl_set_mflag(enum omap_plane_id plane, bool enable) { int bit; @@ -2651,8 +2665,21 @@ static int dispc_ovl_setup(enum omap_plane_id plane, oi->out_width, oi->out_height, oi->fourcc, oi->rotation, oi->zorder, oi->pre_mult_alpha, oi->global_alpha, oi->rotation_type, replication, vm, mem_to_mem); + if (r) + return r; - return r; + /* + * OMAP3 chips have non-working FIFO thresholds for manually updated + * displays. The issue is not fully understood, but this workaround + * fixes the issue. OMAP4 is known to work with default thresholds. + */ + if (mgr_fld_read(channel, DISPC_MGR_FLD_STALLMODE) && + dispc.feat->has_fifo_stallmode_bug) { + DSSDBG("Enable OMAP3 FIFO stallmode bug workaround!\n"); + dispc_ovl_set_manual_fifo_threshold(plane); + } + + return 0; } int dispc_wb_setup(const struct omap_dss_writeback_info *wi, @@ -4067,6 +4094,7 @@ static const struct dispc_features omap24xx_dispc_feats = { .no_framedone_tv = true, .set_max_preload = false, .last_pixel_inc_missing = true, + .has_fifo_stallmode_bug = true, }; static const struct dispc_features omap34xx_rev1_0_dispc_feats = { @@ -4101,6 +4129,7 @@ static const struct dispc_features omap34xx_rev1_0_dispc_feats = { .no_framedone_tv = true, .set_max_preload = false, .last_pixel_inc_missing = true, + .has_fifo_stallmode_bug = true, }; static const struct dispc_features omap34xx_rev3_0_dispc_feats = { @@ -4135,6 +4164,7 @@ static const struct dispc_features omap34xx_rev3_0_dispc_feats = { .no_framedone_tv = true, .set_max_preload = false, .last_pixel_inc_missing = true, + .has_fifo_stallmode_bug = true, }; static const struct dispc_features omap36xx_dispc_feats = { @@ -4169,6 +4199,7 @@ static const struct dispc_features omap36xx_dispc_feats = { .no_framedone_tv = true, .set_max_preload = false, .last_pixel_inc_missing = true, + .has_fifo_stallmode_bug = true, }; static const struct dispc_features am43xx_dispc_feats = { @@ -4203,6 +4234,7 @@ static const struct dispc_features am43xx_dispc_feats = { .no_framedone_tv = true, .set_max_preload = false, .last_pixel_inc_missing = true, + .has_fifo_stallmode_bug = false, }; static const struct dispc_features omap44xx_dispc_feats = { @@ -4242,6 +4274,7 @@ static const struct dispc_features omap44xx_dispc_feats = { .reverse_ilace_field_order = true, .has_gamma_table = true, .has_gamma_i734_bug = true, + .has_fifo_stallmode_bug = false, }; static const struct dispc_features omap54xx_dispc_feats = { @@ -4282,6 +4315,7 @@ static const struct dispc_features omap54xx_dispc_feats = { .reverse_ilace_field_order = true, .has_gamma_table = true, .has_gamma_i734_bug = true, + .has_fifo_stallmode_bug = false, }; static irqreturn_t dispc_irq_handler(int irq, void *arg)