From patchwork Mon Mar 26 16:21:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit Parrot X-Patchwork-Id: 10308179 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2DF8B60212 for ; Mon, 26 Mar 2018 16:21:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1EDDF296A3 for ; Mon, 26 Mar 2018 16:21:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1372129777; Mon, 26 Mar 2018 16:21:44 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A04AC296A3 for ; Mon, 26 Mar 2018 16:21:43 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8C1116E4CD; Mon, 26 Mar 2018 16:21:42 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from fllnx210.ext.ti.com (fllnx210.ext.ti.com [198.47.19.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 252836E4CD for ; Mon, 26 Mar 2018 16:21:40 +0000 (UTC) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllnx210.ext.ti.com (8.15.1/8.15.1) with ESMTP id w2QGLaKk010273; Mon, 26 Mar 2018 11:21:36 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1522081297; bh=lfVOsqiFGfmUFj5ZtTsxnhB1tpdZuVwLDhsQdRpycR0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wXUFtnnJvWZY0CfYRDH/MaeMO7zvGyJKkZUgsJUJRwnUo85jQql5aayQqfn8k6apF BfBkyml66xM3TXEaEGbYyPXB0O57fFBfrp55gYmyLjqDeWR4uciHKaHcewr1sCHqbC Ao1/J/7zcNg6CpOU6hPCD462FaWi65ZfqnrBB4oI= Received: from DLEE108.ent.ti.com (dlee108.ent.ti.com [157.170.170.38]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2QGLa21010704; Mon, 26 Mar 2018 11:21:36 -0500 Received: from DLEE112.ent.ti.com (157.170.170.23) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1261.35; Mon, 26 Mar 2018 11:21:36 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1261.35 via Frontend Transport; Mon, 26 Mar 2018 11:21:36 -0500 Received: from uda0869644a.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id w2QGLUBi002276; Mon, 26 Mar 2018 11:21:36 -0500 From: Benoit Parrot To: , , Laurent Pinchart Subject: [Patch v2 4/6] drm/omap: Add virtual plane DT parsing support Date: Mon, 26 Mar 2018 11:21:26 -0500 Message-ID: <20180326162128.8740-5-bparrot@ti.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20180326162128.8740-1-bparrot@ti.com> References: <20180326162128.8740-1-bparrot@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Ujfalusi , Tomi Valkeinen , Jyri Sarha Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Virtual planes are used to extend display size capability for display larger than 2048 pixels by splitting the frame buffer equally between two physical video-pipelines. Here we are adding DT support to parse 'plane' child nodes which describe how logical planes are mapped to physical video-pipeline(s) and which video-outputs they are available on. Signed-off-by: Benoit Parrot --- drivers/gpu/drm/omapdrm/dss/dispc.c | 110 ++++++++++++++++++++++++++++++++++ drivers/gpu/drm/omapdrm/dss/omapdss.h | 11 ++++ 2 files changed, 121 insertions(+) diff --git a/drivers/gpu/drm/omapdrm/dss/dispc.c b/drivers/gpu/drm/omapdrm/dss/dispc.c index 35541d4441df..06a2e894175e 100644 --- a/drivers/gpu/drm/omapdrm/dss/dispc.c +++ b/drivers/gpu/drm/omapdrm/dss/dispc.c @@ -4360,6 +4360,115 @@ static u32 dispc_get_memory_bandwidth_limit(void) return limit; } +static struct device_node *dispc_of_get_plane_by_id(struct device_node *node, + u32 id) +{ + struct device_node *plane; + + for_each_child_of_node(node, plane) { + u32 plane_id = 0; + + if (of_node_cmp(plane->name, "plane") != 0) + continue; + of_property_read_u32(plane, "reg", &plane_id); + if (id == plane_id) + return plane; + } + + return NULL; +} + +static int dispc_parse_dt_plane_data(struct dispc_plane_mappings *map) +{ + struct platform_device *pdev = dispc.pdev; + struct device_node *np = pdev->dev.of_node; + struct device_node *ep; + struct property *prop; + const __be32 *cur; + u32 v; + u32 num_ovls = dispc_get_num_ovls(); + u32 hw_plane_mask = 0; + u32 num_planes; + int i, index; + + if (!np) + return 0; + + for (i = 0; i < num_ovls; i++) { + ep = dispc_of_get_plane_by_id(np, i); + if (!ep) + break; + if (!of_property_read_bool(ep, "video-pipelines")) { + dev_err(&pdev->dev, + "malformed plane node: video-pipelines missing.\n"); + return -EINVAL; + } + + index = 0; + of_property_for_each_u32(ep, "video-pipelines", prop, cur, v) { + if (v >= num_ovls) { + dev_err(&pdev->dev, + "video-pipelines property: '%d' out-of-range.\n", + v); + return -EINVAL; + } + if (hw_plane_mask & BIT_MASK(v)) { + dev_err(&pdev->dev, + "video-pipelines property: '%d' used more than once.\n", + v); + return -EINVAL; + } + hw_plane_mask |= BIT(v); + + if (index == 0) { + map->plane[i].main_id = v; + } else if (index == 1) { + map->plane[i].aux_id = v; + map->plane[i].is_virtual = true; + } else if (index > 1) { + dev_err(&pdev->dev, + "video-pipelines property: more than 2 values specified.\n"); + return -EINVAL; + } + index++; + } + + of_property_for_each_u32(ep, "video-outputs", prop, cur, v) { + if (v >= dispc_get_num_mgrs()) { + dev_err(&pdev->dev, + "video-outputs property: '%d' out-of-range.\n", + v); + return -EINVAL; + } + map->plane[i].crtc_mask |= BIT(v); + } + } + + num_planes = i; + + if (num_planes) { + dev_dbg(&pdev->dev, "Plane definitions found from DT:"); + for (i = 0; i < num_planes; i++) { + if (map->plane[i].is_virtual) { + dev_dbg(&pdev->dev, + "plane%d: virtual video-pipelines: %d, %d video-output mask: 0x%04x", + i, map->plane[i].main_id, + map->plane[i].aux_id, + map->plane[i].crtc_mask); + } else { + dev_dbg(&pdev->dev, + "plane%d: video-pipelines: %d video-output mask: 0x%04x", + i, map->plane[i].main_id, + map->plane[i].crtc_mask); + } + } + } + + map->num_planes = num_planes; + + return 0; +} + /* * Workaround for errata i734 in DSS dispc * - LCD1 Gamma Correction Is Not Working When GFX Pipe Is Disabled @@ -4552,6 +4661,7 @@ static const struct dispc_ops dispc_ops = { .ovl_setup = dispc_ovl_setup, .ovl_get_color_modes = dispc_ovl_get_color_modes, .ovl_get_max_size = dispc_ovl_get_max_size, + .get_plane_mapping = dispc_parse_dt_plane_data, }; /* DISPC HW IP initialisation */ diff --git a/drivers/gpu/drm/omapdrm/dss/omapdss.h b/drivers/gpu/drm/omapdrm/dss/omapdss.h index c58c75292182..ad0f751ec047 100644 --- a/drivers/gpu/drm/omapdrm/dss/omapdss.h +++ b/drivers/gpu/drm/omapdrm/dss/omapdss.h @@ -637,6 +637,16 @@ void omapdss_set_is_initialized(bool set); struct device_node *dss_of_port_get_parent_device(struct device_node *port); u32 dss_of_port_get_port_number(struct device_node *port); +struct dispc_plane_mappings { + struct { + u32 main_id; + u32 aux_id; + u32 crtc_mask; + bool is_virtual; + } plane[4]; + u32 num_planes; +}; + struct dss_mgr_ops { int (*connect)(enum omap_channel channel, struct omap_dss_device *dst); @@ -720,6 +730,7 @@ struct dispc_ops { const u32 *(*ovl_get_color_modes)(enum omap_plane_id plane); void (*ovl_get_max_size)(u16 *width, u16 *height); + int (*get_plane_mapping)(struct dispc_plane_mappings *plane); }; void dispc_set_ops(const struct dispc_ops *o);