From patchwork Mon Apr 30 11:40:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 10373193 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 38C846032A for ; Tue, 1 May 2018 06:51:45 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 286812881B for ; Tue, 1 May 2018 06:51:45 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1D0CF28BFA; Tue, 1 May 2018 06:51:45 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7B8F52881B for ; Tue, 1 May 2018 06:51:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B14736E3B7; Tue, 1 May 2018 06:51:34 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pf0-x243.google.com (mail-pf0-x243.google.com [IPv6:2607:f8b0:400e:c00::243]) by gabe.freedesktop.org (Postfix) with ESMTPS id EF7F96E1FB for ; Mon, 30 Apr 2018 11:42:52 +0000 (UTC) Received: by mail-pf0-x243.google.com with SMTP id f189so6543844pfa.7 for ; Mon, 30 Apr 2018 04:42:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=jFB4gf1Utj1KIZxbtbvpo9BdsJZSspuQL9e3AoWW1oM=; b=YhxKJa1javifVoKZZ+EjRixZtnbvVDa6O7jIXW5lBquCmY6jRW5UYqOfVW6TzjCINl I/N9OINoFhIvrAbB7u7otZwiEv4QsqNB0e3Z8ZoyGKxJIQ8wiycfoZWZ1Tz0i66KyV65 AinDjQe7bc3/KHWU2eopFATC1KF4smFxosZgc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=jFB4gf1Utj1KIZxbtbvpo9BdsJZSspuQL9e3AoWW1oM=; b=ryA8wepnmuYq1asQjpRmxyUgVFCRAbj29vaOcbsIiCxx+OSSv/CcLf2U2MlMB4ZdFv UC4FlZtWQlGUXFF7/Ky5aiRGKi2Q3kf3T+SjHf7U91fcgD0pUcG/h05zSVCAo70MFzEB xScgsTTHL2Fe9blAFL+gZILPuYE2fB5VpSj2gbWYwWeASpyxNd/yM+9zEoOuZ6zPL91q 3kuzZsqcTvax8A/dTKVgpEJY6AYFLCQRz948Nl6ZVMoVrEc8dswjAVISQx07aattA5sy utB3VSriMLI0FreOGoU2YVgoi/4fcQdvCKXBswKv5eAcXUM81I3NhA0Wbx6gD5WAHLq3 r3qw== X-Gm-Message-State: ALQs6tCVYZV6fGEiJ0/oicmLayMEQn9MsJNthaCw+mU/abgnHx/UkkaS UnlGciRlZLiciF4fUfCyRGtOSQ== X-Google-Smtp-Source: AB8JxZqSpducheTlFu8hkisYe4C1rpq96Z42VSISpSwk7ymNuuE0lOE/wAPMinmMtUj0PWySY3roYA== X-Received: by 2002:a17:902:82c3:: with SMTP id u3-v6mr12067745plz.83.1525088572353; Mon, 30 Apr 2018 04:42:52 -0700 (PDT) Received: from localhost.localdomain ([183.82.224.14]) by smtp.gmail.com with ESMTPSA id s17sm16762357pfi.165.2018.04.30.04.42.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 30 Apr 2018 04:42:51 -0700 (PDT) From: Jagan Teki To: Maxime Ripard Subject: [PATCH 15/21] drm: sun4i: add support for HVCC regulator for DWC HDMI glue Date: Mon, 30 Apr 2018 17:10:52 +0530 Message-Id: <20180430114058.5061-16-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180430114058.5061-1-jagan@amarulasolutions.com> References: <20180430114058.5061-1-jagan@amarulasolutions.com> X-Mailman-Approved-At: Tue, 01 May 2018 06:51:33 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Jernej Skrabec , David Airlie , Catalin Marinas , Michael Turquette , linux-sunxi@googlegroups.com, Will Deacon , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Stephen Boyd , Chen-Yu Tsai , Rob Herring , Jagan Teki , Michael Trimarchi , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Icenowy Zheng MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Icenowy Zheng Allwinner SoCs with DWC HDMI controller have a "HVCC" power pin for the HDMI part, and on some boards it's connected to a dedicated regulator rather than the main 3.3v. Add support for optional HVCC regulator. For boards that doesn't use a dedicated regulator to power it, the default dummy regulator is used. Signed-off-by: Icenowy Zheng Signed-off-by: Jagan Teki --- drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 14 ++++++++++++++ drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 2 ++ 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c index 9f40a44b456b..7c33faff7ad4 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c @@ -73,6 +73,12 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, if (encoder->possible_crtcs == 0) return -EPROBE_DEFER; + hdmi->vcc_hdmi = devm_regulator_get(dev, "hvcc"); + if (IS_ERR(hdmi->vcc_hdmi)) { + dev_err(dev, "Could not get HDMI power supply\n"); + return PTR_ERR(hdmi->vcc_hdmi); + } + hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl"); if (IS_ERR(hdmi->rst_ctrl)) { dev_err(dev, "Could not get ctrl reset control\n"); @@ -91,6 +97,12 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, return ret; } + ret = regulator_enable(hdmi->vcc_hdmi); + if (ret) { + dev_err(dev, "Cannot enable HDMI power supply\n"); + goto err_disable_vcc; + } + ret = clk_prepare_enable(hdmi->clk_tmds); if (ret) { dev_err(dev, "Could not enable tmds clock\n"); @@ -143,6 +155,8 @@ static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master, clk_disable_unprepare(hdmi->clk_tmds); err_assert_ctrl_reset: reset_control_assert(hdmi->rst_ctrl); +err_disable_vcc: + regulator_disable(hdmi->vcc_hdmi); return ret; } diff --git a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h index 79154f0f674a..c25d75ef9303 100644 --- a/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h +++ b/drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h @@ -10,6 +10,7 @@ #include #include #include +#include #include #define SUN8I_HDMI_PHY_DBG_CTRL_REG 0x0000 @@ -173,6 +174,7 @@ struct sun8i_dw_hdmi { struct drm_encoder encoder; struct sun8i_hdmi_phy *phy; struct dw_hdmi_plat_data plat_data; + struct regulator *vcc_hdmi; struct reset_control *rst_ctrl; };