From patchwork Fri May 4 00:08:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 10382317 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 95DC460159 for ; Sat, 5 May 2018 20:10:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8473F28917 for ; Sat, 5 May 2018 20:10:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 794EB28A3B; Sat, 5 May 2018 20:10:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.1 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D705728917 for ; Sat, 5 May 2018 20:10:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A69586E248; Sat, 5 May 2018 20:08:05 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf0-x242.google.com (mail-lf0-x242.google.com [IPv6:2a00:1450:4010:c07::242]) by gabe.freedesktop.org (Postfix) with ESMTPS id 022976E6F7 for ; Fri, 4 May 2018 00:09:27 +0000 (UTC) Received: by mail-lf0-x242.google.com with SMTP id g12-v6so28480102lfb.10 for ; Thu, 03 May 2018 17:09:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VUB1rUJBiDsPuNVgRdOkpHwtp5ZgaynW4L8IRlAJPPU=; b=vH+2xSQZDGDfLRururW79zGxX/naDht2nabk2zQIQcdhTRlKLR3nJhtJ9SOpSfvO/w OzVVVEMxaHIv3F0vOKLwvy1gPXwaybJFRTMOOIr0U6LqWGSR+qE353pQZdoxnwEo44Bx SDTrwdfE8DWx6cdumD6bAaKWRa5lRM7BgdkeA7tNIswpRrxwhLehh/w+K+f0tXlTKJEt GoTvZbuu85GQRgIHqqJWSBAl0vqQA7kQI9s1+6a03thowXN1WnketfIClHB63Xa9wmRM GixUCvDvBZ704YAtoO7TPyr4hljqjhc4UZW6G3F0zrQjPE7LeGDkSlV0jaZQZ4h5x+NY gsUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VUB1rUJBiDsPuNVgRdOkpHwtp5ZgaynW4L8IRlAJPPU=; b=WZVIWG/qbHrk4p7Tus41C2S0YTkTTVxc7y2DpQtWAq7kzWrsVBabtp6X0WBtF3T9n+ wn/CBmbtF7kh2JmzJ6jGWgUB9gIANy1plBHWwbJtm1AK9UxrDK4FZ6bwsbwjf6QSk6Aa Cc6VBm+JOBvJtiLVRjcqqP6Ry7043c8ANhSf/2cI/PSXPTQqkDw4E56GhznxEuz70Lvx lUphSZfNwIaN8DrjhTu1Gn2MLJUd+cZjw1pluQ2Vrut9W6NR70mdZA6xk7WanVmRcnsH oyEb7X++1AykOLrw8flYxwgxvY9TtD/4EEGJ8FQu34EXV2/Z3beVI+A3iadudPZzreXv oWbQ== X-Gm-Message-State: ALQs6tBm8nGpsC2IYA3bCAlml5MX2l3BIgmigugabokd+5eihmP2Sj40 tac07Pay2EXOhL2fOQa0byU= X-Google-Smtp-Source: AB8JxZrsBDtz516Ogyqf9ObIfFhPoRBg2gi85g8YZDGU/77iNWJqllK1Ky6idYw6S5WPWIR/Wxtbqw== X-Received: by 2002:a19:5047:: with SMTP id z7-v6mr16486920lfj.129.1525392566216; Thu, 03 May 2018 17:09:26 -0700 (PDT) Received: from localhost.localdomain (ppp109-252-91-130.pppoe.spdop.ru. [109.252.91.130]) by smtp.gmail.com with ESMTPSA id d85-v6sm1405837lfl.29.2018.05.03.17.09.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 May 2018 17:09:25 -0700 (PDT) From: Dmitry Osipenko To: Thierry Reding Subject: [PATCH v1 1/3] drm/tegra: dc: Enable plane scaling filters Date: Fri, 4 May 2018 03:08:42 +0300 Message-Id: <20180504000844.18661-2-digetx@gmail.com> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180504000844.18661-1-digetx@gmail.com> References: <20180504000844.18661-1-digetx@gmail.com> X-Mailman-Approved-At: Sat, 05 May 2018 20:07:53 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Currently resized plane produces a "pixelated" image which doesn't look nice, especially in a case of a video overlay. Enable scaling filters that significantly improve image quality of a scaled overlay. Signed-off-by: Dmitry Osipenko --- drivers/gpu/drm/tegra/dc.c | 51 ++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/tegra/dc.h | 7 ++++++ 2 files changed, 58 insertions(+) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 9f83a65b5ea9..2e81142281c3 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -361,6 +361,47 @@ static void tegra_dc_setup_window(struct tegra_plane *plane, if (window->bottom_up) value |= V_DIRECTION; + if (!(dc->soc->has_win_a_without_filter && plane->index == 0) && + !(window->src.w == window->dst.w)) { + /* + * Enable horizontal 6-tap filter and set filtering + * coefficients to the default values defined in TRM. + */ + tegra_plane_writel(plane, 0x00008000, DC_WIN_H_FILTER_P(0)); + tegra_plane_writel(plane, 0x3e087ce1, DC_WIN_H_FILTER_P(1)); + tegra_plane_writel(plane, 0x3b117ac1, DC_WIN_H_FILTER_P(2)); + tegra_plane_writel(plane, 0x591b73aa, DC_WIN_H_FILTER_P(3)); + tegra_plane_writel(plane, 0x57256d9a, DC_WIN_H_FILTER_P(4)); + tegra_plane_writel(plane, 0x552f668b, DC_WIN_H_FILTER_P(5)); + tegra_plane_writel(plane, 0x73385e8b, DC_WIN_H_FILTER_P(6)); + tegra_plane_writel(plane, 0x72435583, DC_WIN_H_FILTER_P(7)); + tegra_plane_writel(plane, 0x714c4c8b, DC_WIN_H_FILTER_P(8)); + tegra_plane_writel(plane, 0x70554393, DC_WIN_H_FILTER_P(9)); + tegra_plane_writel(plane, 0x715e389b, DC_WIN_H_FILTER_P(10)); + tegra_plane_writel(plane, 0x71662faa, DC_WIN_H_FILTER_P(11)); + tegra_plane_writel(plane, 0x536d25ba, DC_WIN_H_FILTER_P(12)); + tegra_plane_writel(plane, 0x55731bca, DC_WIN_H_FILTER_P(13)); + tegra_plane_writel(plane, 0x387a11d9, DC_WIN_H_FILTER_P(14)); + tegra_plane_writel(plane, 0x3c7c08f1, DC_WIN_H_FILTER_P(15)); + + value |= H_FILTER; + } + + if (!(dc->soc->has_win_a_without_filter && plane->index == 0) && + !(dc->soc->has_win_c_without_vert_filter && plane->index == 2) && + !(window->src.h == window->dst.h)) { + unsigned int i, k; + + /* + * Enable vertical 2-tap filter and set filtering + * coefficients to the default values defined in TRM. + */ + for (i = 0, k = 128; i < 16; i++, k -= 8) + tegra_plane_writel(plane, k, DC_WIN_V_FILTER_P(i)); + + value |= V_FILTER; + } + tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS); if (dc->soc->supports_blending) @@ -1978,6 +2019,8 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = { .num_overlay_formats = ARRAY_SIZE(tegra20_overlay_formats), .overlay_formats = tegra20_overlay_formats, .modifiers = tegra20_modifiers, + .has_win_a_without_filter = true, + .has_win_c_without_vert_filter = true, }; static const struct tegra_dc_soc_info tegra30_dc_soc_info = { @@ -1995,6 +2038,8 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = { .num_overlay_formats = ARRAY_SIZE(tegra20_overlay_formats), .overlay_formats = tegra20_overlay_formats, .modifiers = tegra20_modifiers, + .has_win_a_without_filter = false, + .has_win_c_without_vert_filter = false, }; static const struct tegra_dc_soc_info tegra114_dc_soc_info = { @@ -2012,6 +2057,8 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = { .num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats), .overlay_formats = tegra114_overlay_formats, .modifiers = tegra20_modifiers, + .has_win_a_without_filter = false, + .has_win_c_without_vert_filter = false, }; static const struct tegra_dc_soc_info tegra124_dc_soc_info = { @@ -2029,6 +2076,8 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = { .num_overlay_formats = ARRAY_SIZE(tegra124_overlay_formats), .overlay_formats = tegra124_overlay_formats, .modifiers = tegra124_modifiers, + .has_win_a_without_filter = false, + .has_win_c_without_vert_filter = false, }; static const struct tegra_dc_soc_info tegra210_dc_soc_info = { @@ -2046,6 +2095,8 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = { .num_overlay_formats = ARRAY_SIZE(tegra114_overlay_formats), .overlay_formats = tegra114_overlay_formats, .modifiers = tegra124_modifiers, + .has_win_a_without_filter = false, + .has_win_c_without_vert_filter = false, }; static const struct tegra_windowgroup_soc tegra186_dc_wgrps[] = { diff --git a/drivers/gpu/drm/tegra/dc.h b/drivers/gpu/drm/tegra/dc.h index d2b50d32de4d..5c3d1d6faa3b 100644 --- a/drivers/gpu/drm/tegra/dc.h +++ b/drivers/gpu/drm/tegra/dc.h @@ -67,6 +67,8 @@ struct tegra_dc_soc_info { const u32 *overlay_formats; unsigned int num_overlay_formats; const u64 *modifiers; + bool has_win_a_without_filter; + bool has_win_c_without_vert_filter; }; struct tegra_dc { @@ -553,6 +555,9 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc); #define THREAD_NUM(x) (((x) & 0x1f) << 1) #define THREAD_GROUP_ENABLE (1 << 0) +#define DC_WIN_H_FILTER_P(p) (0x601 + p) +#define DC_WIN_V_FILTER_P(p) (0x619 + p) + #define DC_WIN_CSC_YOF 0x611 #define DC_WIN_CSC_KYRGB 0x612 #define DC_WIN_CSC_KUR 0x613 @@ -566,6 +571,8 @@ int tegra_dc_rgb_exit(struct tegra_dc *dc); #define H_DIRECTION (1 << 0) #define V_DIRECTION (1 << 2) #define COLOR_EXPAND (1 << 6) +#define H_FILTER (1 << 8) +#define V_FILTER (1 << 10) #define CSC_ENABLE (1 << 18) #define WIN_ENABLE (1 << 30)