Message ID | 20180902072643.4917-3-jernej.skrabec@siol.net (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Allwinner H6 DE3 and HDMI support | expand |
On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec <jernej.skrabec@siol.net> wrote: > > From: Icenowy Zheng <icenowy@aosc.io> > > As we have already binding for the H6 system controller, add its node > to the device tree. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > [fixed compatible string] > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
于 2018年9月4日 GMT+08:00 下午4:40:56, Chen-Yu Tsai <wens@csie.org> 写到: >On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec <jernej.skrabec@siol.net> >wrote: >> >> From: Icenowy Zheng <icenowy@aosc.io> >> >> As we have already binding for the H6 system controller, add its node >> to the device tree. >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> >> [fixed compatible string] >> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > >Reviewed-by: Chen-Yu Tsai <wens@csie.org> By the way can these patches be applied first? (patches related to syscon). They're also needed for EMAC.
On Tue, Sep 4, 2018 at 4:44 PM Icenowy Zheng <icenowy@aosc.io> wrote: > > > > 于 2018年9月4日 GMT+08:00 下午4:40:56, Chen-Yu Tsai <wens@csie.org> 写到: > >On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec <jernej.skrabec@siol.net> > >wrote: > >> > >> From: Icenowy Zheng <icenowy@aosc.io> > >> > >> As we have already binding for the H6 system controller, add its node > >> to the device tree. > >> > >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> > >> [fixed compatible string] > >> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> > > > >Reviewed-by: Chen-Yu Tsai <wens@csie.org> > > By the way can these patches be applied first? (patches > related to syscon). > > They're also needed for EMAC. Applied. BTW, the H6 system control EMAC register also has the internal PHY related controls seen on H3/H5. IIRC you previously mentioned that they have no effect? ChenYu
于 2018年9月12日 GMT+08:00 下午10:49:12, Chen-Yu Tsai <wens@csie.org> 写到: >On Tue, Sep 4, 2018 at 4:44 PM Icenowy Zheng <icenowy@aosc.io> wrote: >> >> >> >> 于 2018年9月4日 GMT+08:00 下午4:40:56, Chen-Yu Tsai <wens@csie.org> 写到: >> >On Sun, Sep 2, 2018 at 3:27 PM Jernej Skrabec ><jernej.skrabec@siol.net> >> >wrote: >> >> >> >> From: Icenowy Zheng <icenowy@aosc.io> >> >> >> >> As we have already binding for the H6 system controller, add its >node >> >> to the device tree. >> >> >> >> Signed-off-by: Icenowy Zheng <icenowy@aosc.io> >> >> [fixed compatible string] >> >> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> >> > >> >Reviewed-by: Chen-Yu Tsai <wens@csie.org> >> >> By the way can these patches be applied first? (patches >> related to syscon). >> >> They're also needed for EMAC. > >Applied. > >BTW, the H6 system control EMAC register also has the internal PHY >related controls seen on H3/H5. IIRC you previously mentioned that >they have no effect? Yes, because the "internal PHY" on H6 is on AC200. The internal/external mux bit has effect (although it will mux to a non-existent PHY when switching to "internal", render EMAC not usable), but it also has effect on A64 (same effect with H6), on which it's not documented. > >ChenYu > >_______________________________________________ >linux-arm-kernel mailing list >linux-arm-kernel@lists.infradead.org >http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi index cfa5fffcf62b..040828d2e2c0 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi @@ -92,6 +92,29 @@ #size-cells = <1>; ranges; + syscon: syscon@3000000 { + compatible = "allwinner,sun50i-h6-system-control", + "allwinner,sun50i-a64-system-control"; + reg = <0x03000000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_c: sram@28000 { + compatible = "mmio-sram"; + reg = <0x00028000 0x1e000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00028000 0x1e000>; + + de2_sram: sram-section@0 { + compatible = "allwinner,sun50i-h6-sram-c", + "allwinner,sun50i-a64-sram-c"; + reg = <0x0000 0x1e000>; + }; + }; + }; + ccu: clock@3001000 { compatible = "allwinner,sun50i-h6-ccu"; reg = <0x03001000 0x1000>;