diff mbox series

[2/3] drm/msm: dpu: Add extra_flush_bits to trigger_flush trace

Message ID 20180919183426.200909-2-sean@poorly.run (mailing list archive)
State New, archived
Headers show
Series [1/3] drm/msm: dpu: Clear frame_busy_mask bit after trace | expand

Commit Message

Sean Paul Sept. 19, 2018, 6:33 p.m. UTC 
From: Sean Paul <seanpaul@chromium.org>

It's useful to know which bits of the flush come from "extra_flush_bits"

Signed-off-by: Sean Paul <seanpaul@chromium.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  3 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h   | 14 +++++++++-----
 2 files changed, 11 insertions(+), 6 deletions(-)

Comments

Abhinav Kumar Sept. 19, 2018, 8:01 p.m. UTC | #1 
On 2018-09-19 11:33, Sean Paul wrote:
> From: Sean Paul <seanpaul@chromium.org>
> 
> It's useful to know which bits of the flush come from 
> "extra_flush_bits"
> 
> Signed-off-by: Sean Paul <seanpaul@chromium.org>
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org>
> ---
>  drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c |  3 ++-
>  drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h   | 14 +++++++++-----
>  2 files changed, 11 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index e56f29190121..8f6880db5c99 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -1444,7 +1444,8 @@ static inline void
> _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
>  		ret = ctl->ops.get_pending_flush(ctl);
> 
>  	trace_dpu_enc_trigger_flush(DRMID(drm_enc), phys->intf_idx,
> -				    pending_kickoff_cnt, ctl->idx, ret);
> +				    pending_kickoff_cnt, ctl->idx,
> +				    extra_flush_bits, ret);
>  }
> 
>  /**
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
> index 0be51db02f2e..ae6b0c51ba52 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
> @@ -468,14 +468,16 @@ TRACE_EVENT(dpu_enc_frame_done_cb,
> 
>  TRACE_EVENT(dpu_enc_trigger_flush,
>  	TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
> -		 int pending_kickoff_cnt, int ctl_idx, u32 pending_flush_ret),
> +		 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits,
> +		 u32 pending_flush_ret),
>  	TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx,
> -		pending_flush_ret),
> +		extra_flush_bits, pending_flush_ret),
>  	TP_STRUCT__entry(
>  		__field(	uint32_t,	drm_id			)
>  		__field(	enum dpu_intf,	intf_idx		)
>  		__field(	int,		pending_kickoff_cnt	)
>  		__field(	int,		ctl_idx			)
> +		__field(	u32,		extra_flush_bits	)
>  		__field(	u32,		pending_flush_ret	)
>  	),
>  	TP_fast_assign(
> @@ -483,12 +485,14 @@ TRACE_EVENT(dpu_enc_trigger_flush,
>  		__entry->intf_idx = intf_idx;
>  		__entry->pending_kickoff_cnt = pending_kickoff_cnt;
>  		__entry->ctl_idx = ctl_idx;
> +		__entry->extra_flush_bits = extra_flush_bits;
>  		__entry->pending_flush_ret = pending_flush_ret;
>  	),
>  	TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
> -		  "pending_flush_ret=%u", __entry->drm_id,
> -		  __entry->intf_idx, __entry->pending_kickoff_cnt,
> -		  __entry->ctl_idx, __entry->pending_flush_ret)
> +		  "extra_flush_bits=0x%x pending_flush_ret=0x%x",
> +		  __entry->drm_id, __entry->intf_idx,
> +		  __entry->pending_kickoff_cnt, __entry->ctl_idx,
> +		  __entry->extra_flush_bits, __entry->pending_flush_ret)
>  );
> 
>  DECLARE_EVENT_CLASS(dpu_enc_ktime_template,
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
index e56f29190121..8f6880db5c99 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
@@ -1444,7 +1444,8 @@  static inline void _dpu_encoder_trigger_flush(struct drm_encoder *drm_enc,
 		ret = ctl->ops.get_pending_flush(ctl);
 
 	trace_dpu_enc_trigger_flush(DRMID(drm_enc), phys->intf_idx,
-				    pending_kickoff_cnt, ctl->idx, ret);
+				    pending_kickoff_cnt, ctl->idx,
+				    extra_flush_bits, ret);
 }
 
 /**
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
index 0be51db02f2e..ae6b0c51ba52 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h
@@ -468,14 +468,16 @@  TRACE_EVENT(dpu_enc_frame_done_cb,
 
 TRACE_EVENT(dpu_enc_trigger_flush,
 	TP_PROTO(uint32_t drm_id, enum dpu_intf intf_idx,
-		 int pending_kickoff_cnt, int ctl_idx, u32 pending_flush_ret),
+		 int pending_kickoff_cnt, int ctl_idx, u32 extra_flush_bits,
+		 u32 pending_flush_ret),
 	TP_ARGS(drm_id, intf_idx, pending_kickoff_cnt, ctl_idx,
-		pending_flush_ret),
+		extra_flush_bits, pending_flush_ret),
 	TP_STRUCT__entry(
 		__field(	uint32_t,	drm_id			)
 		__field(	enum dpu_intf,	intf_idx		)
 		__field(	int,		pending_kickoff_cnt	)
 		__field(	int,		ctl_idx			)
+		__field(	u32,		extra_flush_bits	)
 		__field(	u32,		pending_flush_ret	)
 	),
 	TP_fast_assign(
@@ -483,12 +485,14 @@  TRACE_EVENT(dpu_enc_trigger_flush,
 		__entry->intf_idx = intf_idx;
 		__entry->pending_kickoff_cnt = pending_kickoff_cnt;
 		__entry->ctl_idx = ctl_idx;
+		__entry->extra_flush_bits = extra_flush_bits;
 		__entry->pending_flush_ret = pending_flush_ret;
 	),
 	TP_printk("id=%u, intf_idx=%d, pending_kickoff_cnt=%d ctl_idx=%d "
-		  "pending_flush_ret=%u", __entry->drm_id,
-		  __entry->intf_idx, __entry->pending_kickoff_cnt,
-		  __entry->ctl_idx, __entry->pending_flush_ret)
+		  "extra_flush_bits=0x%x pending_flush_ret=0x%x",
+		  __entry->drm_id, __entry->intf_idx,
+		  __entry->pending_kickoff_cnt, __entry->ctl_idx,
+		  __entry->extra_flush_bits, __entry->pending_flush_ret)
 );
 
 DECLARE_EVENT_CLASS(dpu_enc_ktime_template,