From patchwork Thu Oct 18 11:19:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 10647025 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 65AA517D4 for ; Thu, 18 Oct 2018 11:19:13 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5A14B285E2 for ; Thu, 18 Oct 2018 11:19:13 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4E8AB28607; Thu, 18 Oct 2018 11:19:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 040A4285E2 for ; Thu, 18 Oct 2018 11:19:12 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CFC89890BF; Thu, 18 Oct 2018 11:19:10 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x141.google.com (mail-lf1-x141.google.com [IPv6:2a00:1450:4864:20::141]) by gabe.freedesktop.org (Postfix) with ESMTPS id B52E7890BF for ; Thu, 18 Oct 2018 11:19:09 +0000 (UTC) Received: by mail-lf1-x141.google.com with SMTP id d7-v6so1668938lfi.2 for ; Thu, 18 Oct 2018 04:19:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=JCFudUA25pSnlZE45WxJMy0H/eYshQfYbRDndPN0Ilw=; b=KmIWtLWaK2ZFKpdIA0X6aFusHxn2RtK6KoW3at3pV+4dFrCXqzrzUI2yYbEyHKmm3G GDLGwT+pNeg4RBiOuKsERvQ3EPdtjL18T3YdtFgLSGGTKIJT5fPFCvgKz54WuExAuMg5 JB6nO6JOJ8jIvCAVN34hsb1GSVJYRnM8m24svwFa0ys/XopScfJMtyphkpxzEvBCPQd6 Jz7oIZmV9bYpiP2tyqk6V8IOONk4Qxbb72wR5MWODtCXP3o3GXHcHk8HXIrADbQpN3FQ VNjuXWuZxKJxHZjgePjmObD8Y3yxMbBJtPkU4JgD8Ah9fB3DZ4lPicp4ulxwaxqfX3YC 0ojQ== X-Gm-Message-State: ABuFfoj5rCO207zZ14NBv268HsXT1DKml6GXiIoYgzY4trehSxC6wOCE dHwk8mGOY8nh1ssn8RafOPSshukx59w= X-Google-Smtp-Source: ACcGV63zWiG9Wx1PrUf3n1pa9Ht6nKPJrhoBeMcfeLggeWRVrN+0uNq6NvIATRbb/Y0n/uoiFvaO8Q== X-Received: by 2002:a19:d58b:: with SMTP id m133-v6mr18294242lfg.105.1539861547819; Thu, 18 Oct 2018 04:19:07 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id h2-v6sm4386331lfb.27.2018.10.18.04.19.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 18 Oct 2018 04:19:06 -0700 (PDT) From: Linus Walleij To: Thierry Reding , dri-devel@lists.freedesktop.org Subject: [PATCH v2] drm: dsi: Add lane clock rate fields to DSI device Date: Thu, 18 Oct 2018 13:19:02 +0200 Message-Id: <20181018111902.31738-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.17.2 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The DSI devices have a maximum operating frequency specified in their data sheet per the MIPI specification, and DSI hosts that can scale their frequency need this information to set their clock dividers right. As current panel drivers often lack this information, specify that setting it to zero will make the DSI host use some reasonable default. Cc: Andrzej Hajda Signed-off-by: Linus Walleij Reviewed-by: Andrzej Hajda Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
--- ChangeLog v1->v2: - s/*_rate_hz/*_rate/g - s/operation/mode/g - Clarify that zero is only allowed for legacy drivers --- include/drm/drm_mipi_dsi.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index 4fef19064b0f..da3499de2dc2 100644 --- a/include/drm/drm_mipi_dsi.h +++ b/include/drm/drm_mipi_dsi.h @@ -168,6 +168,12 @@ struct mipi_dsi_device_info { * @format: pixel format for video mode * @lanes: number of active data lanes * @mode_flags: DSI operation mode related flags + * @hs_rate: Maximum lane frequency for high speed mode, this should + * be set to the real limits of the hardware, zero is only accepted for + * legacy drivers + * @lp_rate: Maximum lane frequency for low power mode, this should + * be set to the real limits of the hardware, zero is only accepted for + * legacy drivers */ struct mipi_dsi_device { struct mipi_dsi_host *host; @@ -178,6 +184,8 @@ struct mipi_dsi_device { unsigned int lanes; enum mipi_dsi_pixel_format format; unsigned long mode_flags; + unsigned long hs_rate; + unsigned long lp_rate; }; #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:"