diff mbox series

[v2,02/15] clk: sunxi-ng: Add check for minimal rate to NKM PLLs

Message ID 20181023155035.9101-3-jagan@amarulasolutions.com (mailing list archive)
State New, archived
Headers show
Series drm/sun4i: Allwinner A64 MIPI-DSI support | expand

Commit Message

Jagan Teki Oct. 23, 2018, 3:50 p.m. UTC
Some NKM PLLs doesn't work well when their output clock rate is set below
certain rate.

So, add support for minimal rate for relevant PLLs.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
---
Changes for v2:
- new patch

 drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
 drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
 2 files changed, 8 insertions(+)

Comments

Stephen Boyd Oct. 24, 2018, 8:48 a.m. UTC | #1
Quoting Jagan Teki (2018-10-23 08:50:22)
> Some NKM PLLs doesn't work well when their output clock rate is set below
> certain rate.
> 
> So, add support for minimal rate for relevant PLLs.
> 
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---

Acked-by: Stephen Boyd <sboyd@kernel.org>
Maxime Ripard Oct. 24, 2018, 6:04 p.m. UTC | #2
On Tue, Oct 23, 2018 at 09:20:22PM +0530, Jagan Teki wrote:
> Some NKM PLLs doesn't work well when their output clock rate is set below
> certain rate.
> 
> So, add support for minimal rate for relevant PLLs.
> 
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> ---
> Changes for v2:
> - new patch
> 
>  drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
>  drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
>  2 files changed, 8 insertions(+)
> 
> diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
> index 841840e35e61..d17539dc88dd 100644
> --- a/drivers/clk/sunxi-ng/ccu_nkm.c
> +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
> @@ -125,6 +125,13 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
>  	if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
>  		rate *= nkm->fixed_post_div;
>  
> +	if (rate < nkm->min_rate) {
> +		rate = nkm->min_rate;
> +		if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> +			rate /= nkm->fixed_post_div;

I'm not sure this is right. Is the post divider taken into account to
calculate the minimum, or is the minimum on the rate before the fixed
post divider.

How did you test this?

Maxime
Jagan Teki Oct. 25, 2018, 10:55 a.m. UTC | #3
On Wed, Oct 24, 2018 at 11:34 PM Maxime Ripard
<maxime.ripard@bootlin.com> wrote:
>
> On Tue, Oct 23, 2018 at 09:20:22PM +0530, Jagan Teki wrote:
> > Some NKM PLLs doesn't work well when their output clock rate is set below
> > certain rate.
> >
> > So, add support for minimal rate for relevant PLLs.
> >
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> > Changes for v2:
> > - new patch
> >
> >  drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
> >  drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
> >  2 files changed, 8 insertions(+)
> >
> > diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
> > index 841840e35e61..d17539dc88dd 100644
> > --- a/drivers/clk/sunxi-ng/ccu_nkm.c
> > +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
> > @@ -125,6 +125,13 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
> >       if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> >               rate *= nkm->fixed_post_div;
> >
> > +     if (rate < nkm->min_rate) {
> > +             rate = nkm->min_rate;
> > +             if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> > +                     rate /= nkm->fixed_post_div;
>
> I'm not sure this is right. Is the post divider taken into account to
> calculate the minimum, or is the minimum on the rate before the fixed
> post divider.

Since we are returning from here, we need to take care post div which
is actually doing at the end of round_rate.

>
> How did you test this?

I've not used this on PLL_MIPI atleast, so I didn't test this.
Maxime Ripard Oct. 29, 2018, 8:58 a.m. UTC | #4
On Thu, Oct 25, 2018 at 04:25:59PM +0530, Jagan Teki wrote:
> On Wed, Oct 24, 2018 at 11:34 PM Maxime Ripard
> <maxime.ripard@bootlin.com> wrote:
> >
> > On Tue, Oct 23, 2018 at 09:20:22PM +0530, Jagan Teki wrote:
> > > Some NKM PLLs doesn't work well when their output clock rate is set below
> > > certain rate.
> > >
> > > So, add support for minimal rate for relevant PLLs.
> > >
> > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > > ---
> > > Changes for v2:
> > > - new patch
> > >
> > >  drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
> > >  drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
> > >  2 files changed, 8 insertions(+)
> > >
> > > diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
> > > index 841840e35e61..d17539dc88dd 100644
> > > --- a/drivers/clk/sunxi-ng/ccu_nkm.c
> > > +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
> > > @@ -125,6 +125,13 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
> > >       if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> > >               rate *= nkm->fixed_post_div;
> > >
> > > +     if (rate < nkm->min_rate) {
> > > +             rate = nkm->min_rate;
> > > +             if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> > > +                     rate /= nkm->fixed_post_div;
> >
> > I'm not sure this is right. Is the post divider taken into account to
> > calculate the minimum, or is the minimum on the rate before the fixed
> > post divider.
> 
> Since we are returning from here, we need to take care post div which
> is actually doing at the end of round_rate.

That's not my point though. Does the rate needs to be superior to min
/ post_div, or min?

> >
> > How did you test this?
> 
> I've not used this on PLL_MIPI atleast, so I didn't test this.

If you've never tested this, why are you adding that code?

Maxime
Jagan Teki Oct. 29, 2018, 12:40 p.m. UTC | #5
On 29/10/18 2:28 PM, Maxime Ripard wrote:
> On Thu, Oct 25, 2018 at 04:25:59PM +0530, Jagan Teki wrote:
>> On Wed, Oct 24, 2018 at 11:34 PM Maxime Ripard
>> <maxime.ripard@bootlin.com> wrote:
>>>
>>> On Tue, Oct 23, 2018 at 09:20:22PM +0530, Jagan Teki wrote:
>>>> Some NKM PLLs doesn't work well when their output clock rate is set below
>>>> certain rate.
>>>>
>>>> So, add support for minimal rate for relevant PLLs.
>>>>
>>>> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
>>>> ---
>>>> Changes for v2:
>>>> - new patch
>>>>
>>>>   drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
>>>>   drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
>>>>   2 files changed, 8 insertions(+)
>>>>
>>>> diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
>>>> index 841840e35e61..d17539dc88dd 100644
>>>> --- a/drivers/clk/sunxi-ng/ccu_nkm.c
>>>> +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
>>>> @@ -125,6 +125,13 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
>>>>        if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
>>>>                rate *= nkm->fixed_post_div;
>>>>
>>>> +     if (rate < nkm->min_rate) {
>>>> +             rate = nkm->min_rate;
>>>> +             if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
>>>> +                     rate /= nkm->fixed_post_div;
>>>
>>> I'm not sure this is right. Is the post divider taken into account to
>>> calculate the minimum, or is the minimum on the rate before the fixed
>>> post divider.
>>
>> Since we are returning from here, we need to take care post div which
>> is actually doing at the end of round_rate.
> 
> That's not my point though. Does the rate needs to be superior to min
> / post_div, or min?

ie what I'm trying to say, since it's common code min or max should / 
post_div and PLL_MIPI doesn't use any post_div.

We need to take care post_div though the current test (PLL_MIPI) in not 
used since it's common code. just like nkmp, nm etc.

> 
>>>
>>> How did you test this?
>>
>> I've not used this on PLL_MIPI atleast, so I didn't test this.
> 
> If you've never tested this, why are you adding that code?

Like above, it's common code. otherwise might effect.
Maxime Ripard Nov. 5, 2018, 10:11 a.m. UTC | #6
On Mon, Oct 29, 2018 at 06:10:47PM +0530, Jagan Teki wrote:
> On 29/10/18 2:28 PM, Maxime Ripard wrote:
> > On Thu, Oct 25, 2018 at 04:25:59PM +0530, Jagan Teki wrote:
> > > On Wed, Oct 24, 2018 at 11:34 PM Maxime Ripard
> > > <maxime.ripard@bootlin.com> wrote:
> > > > 
> > > > On Tue, Oct 23, 2018 at 09:20:22PM +0530, Jagan Teki wrote:
> > > > > Some NKM PLLs doesn't work well when their output clock rate is set below
> > > > > certain rate.
> > > > > 
> > > > > So, add support for minimal rate for relevant PLLs.
> > > > > 
> > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > > > > ---
> > > > > Changes for v2:
> > > > > - new patch
> > > > > 
> > > > >   drivers/clk/sunxi-ng/ccu_nkm.c | 7 +++++++
> > > > >   drivers/clk/sunxi-ng/ccu_nkm.h | 1 +
> > > > >   2 files changed, 8 insertions(+)
> > > > > 
> > > > > diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
> > > > > index 841840e35e61..d17539dc88dd 100644
> > > > > --- a/drivers/clk/sunxi-ng/ccu_nkm.c
> > > > > +++ b/drivers/clk/sunxi-ng/ccu_nkm.c
> > > > > @@ -125,6 +125,13 @@ static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
> > > > >        if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> > > > >                rate *= nkm->fixed_post_div;
> > > > > 
> > > > > +     if (rate < nkm->min_rate) {
> > > > > +             rate = nkm->min_rate;
> > > > > +             if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
> > > > > +                     rate /= nkm->fixed_post_div;
> > > > 
> > > > I'm not sure this is right. Is the post divider taken into account to
> > > > calculate the minimum, or is the minimum on the rate before the fixed
> > > > post divider.
> > > 
> > > Since we are returning from here, we need to take care post div which
> > > is actually doing at the end of round_rate.
> > 
> > That's not my point though. Does the rate needs to be superior to min
> > / post_div, or min?
> 
> ie what I'm trying to say, since it's common code min or max should /
> post_div and PLL_MIPI doesn't use any post_div.
> 
> We need to take care post_div though the current test (PLL_MIPI) in not used
> since it's common code. just like nkmp, nm etc.
> 
> > 
> > > > 
> > > > How did you test this?
> > > 
> > > I've not used this on PLL_MIPI atleast, so I didn't test this.
> > 
> > If you've never tested this, why are you adding that code?
> 
> Like above, it's common code. otherwise might effect.

Adding untested, unverified and unneeded code is just bloat, nothing
else.

Maxime
diff mbox series

Patch

diff --git a/drivers/clk/sunxi-ng/ccu_nkm.c b/drivers/clk/sunxi-ng/ccu_nkm.c
index 841840e35e61..d17539dc88dd 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.c
+++ b/drivers/clk/sunxi-ng/ccu_nkm.c
@@ -125,6 +125,13 @@  static unsigned long ccu_nkm_round_rate(struct ccu_mux_internal *mux,
 	if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
 		rate *= nkm->fixed_post_div;
 
+	if (rate < nkm->min_rate) {
+		rate = nkm->min_rate;
+		if (nkm->common.features & CCU_FEATURE_FIXED_POSTDIV)
+			rate /= nkm->fixed_post_div;
+		return rate;
+	}
+
 	ccu_nkm_find_best(*parent_rate, rate, &_nkm);
 
 	rate = *parent_rate * _nkm.n * _nkm.k / _nkm.m;
diff --git a/drivers/clk/sunxi-ng/ccu_nkm.h b/drivers/clk/sunxi-ng/ccu_nkm.h
index cc6efb70a102..ff5bd00f429f 100644
--- a/drivers/clk/sunxi-ng/ccu_nkm.h
+++ b/drivers/clk/sunxi-ng/ccu_nkm.h
@@ -35,6 +35,7 @@  struct ccu_nkm {
 	struct ccu_mux_internal	mux;
 
 	unsigned int		fixed_post_div;
+	unsigned int		min_rate;
 
 	struct ccu_common	common;
 };