From patchwork Tue Oct 30 16:00:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sean Paul X-Patchwork-Id: 10661195 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E58C915E9 for ; Tue, 30 Oct 2018 16:00:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D158C2A8BF for ; Tue, 30 Oct 2018 16:00:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CF6112A794; Tue, 30 Oct 2018 16:00:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7ED852A8C5 for ; Tue, 30 Oct 2018 16:00:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 2260489FF6; Tue, 30 Oct 2018 16:00:38 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-yb1-xb44.google.com (mail-yb1-xb44.google.com [IPv6:2607:f8b0:4864:20::b44]) by gabe.freedesktop.org (Postfix) with ESMTPS id F018F6E101 for ; Tue, 30 Oct 2018 16:00:36 +0000 (UTC) Received: by mail-yb1-xb44.google.com with SMTP id d18-v6so5247330yba.4 for ; Tue, 30 Oct 2018 09:00:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=JJkHZ9UxjfWZkRIGJv3F/GmGXldUynfEobZKFnrT9/o=; b=fuocXWXHpY92YOMBknTpU0MBjKdRCjWS3aZdgLGnmWQ6G5C2RXeMVGPkcLmQDt2QPI aekS4qvDeNYhrWFcNHEozoAy2s84XjivcJmijaPzq0PGsxNqskR/PzXqcUVkzT2dYeYA sx22LwjjhqNeZ5WGVZZ08IUApE75FuqFRqALW16E+cupiutoHkVxvmse34fymVFTRqoU Uv3RZeGA9V+EMdQUmD0dOpylS0OCbVZdqt57qCphVoDKuWip5DIXyEH//73kKCIscOpK tllnBqfoKA2GhNcdko6cO+G7GllpdWSH5ZQ6entbgyRmKr5POOMlzgiqGxlFkfPY0TSx w8Jw== X-Gm-Message-State: AGRZ1gI4Jj6kJyrdQUI0mb2/4p0uV4dXC8doDtFZggdEtL9IfRmIINzz r/wjovO+oFRWigSz74FuxZCo0pTaqF0= X-Google-Smtp-Source: AJdET5eMuJwz6mQcHrJIaUIWxD4u6yqXuTCVE6mPrMlicQaW1uUp/drR/ZGNMXsSCUpsAkiBp4Lpag== X-Received: by 2002:a25:27c4:: with SMTP id n187-v6mr9614022ybn.153.1540915235280; Tue, 30 Oct 2018 09:00:35 -0700 (PDT) Received: from rosewood.cam.corp.google.com ([2620:0:1013:11:ad55:b1db:adfe:3b9f]) by smtp.gmail.com with ESMTPSA id c75-v6sm13527353ywh.109.2018.10.30.09.00.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 30 Oct 2018 09:00:34 -0700 (PDT) From: Sean Paul To: dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v2 1/3] drm/msm: dpu: Mask inactive pending flushes Date: Tue, 30 Oct 2018 12:00:07 -0400 Message-Id: <20181030160033.18464-1-sean@poorly.run> X-Mailer: git-send-email 2.19.1.568.g152ad8e336-goog MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sean Paul , Abhinav Kumar Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Sean Paul This patch masks any pending flushes which have not been latched for a commit. This will catch the case where an asynchronous update is nullified by a disable in the same frame. Changes in v2: - Added to the set Signed-off-by: Sean Paul --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c index 8fa601a9abbf..d7a7fedc09f7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -28,6 +28,7 @@ #define CTL_TOP 0x014 #define CTL_FLUSH 0x018 #define CTL_START 0x01C +#define CTL_FLUSH_MASK 0x090 #define CTL_PREPARE 0x0d0 #define CTL_SW_RESET 0x030 #define CTL_LAYER_EXTN_OFFSET 0x40 @@ -121,6 +122,12 @@ static inline void dpu_hw_ctl_trigger_flush(struct dpu_hw_ctl *ctx) { trace_dpu_hw_ctl_trigger_pending_flush(ctx->pending_flush_mask, dpu_hw_ctl_get_flush_register(ctx)); + + /* + * Async updates could have changed CTL_FLUSH since it was last latched. + * Mask anything not involved in this latest commit. + */ + DPU_REG_WRITE(&ctx->hw, CTL_FLUSH_MASK, ~ctx->pending_flush_mask); DPU_REG_WRITE(&ctx->hw, CTL_FLUSH, ctx->pending_flush_mask); }