From patchwork Tue Nov 13 17:12:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ben Hutchings X-Patchwork-Id: 10682053 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1EDC21747 for ; Wed, 14 Nov 2018 08:17:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 16A9E2AA60 for ; Wed, 14 Nov 2018 08:17:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0AFA92B1A1; Wed, 14 Nov 2018 08:17:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id AAEE32AA60 for ; Wed, 14 Nov 2018 08:17:03 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 308096E4B1; Wed, 14 Nov 2018 08:16:41 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org X-Greylist: delayed 2607 seconds by postgrey-1.36 at gabe; Tue, 13 Nov 2018 17:54:23 UTC Received: from imap1.codethink.co.uk (imap1.codethink.co.uk [176.9.8.82]) by gabe.freedesktop.org (Postfix) with ESMTPS id 93ED56E293 for ; Tue, 13 Nov 2018 17:54:23 +0000 (UTC) Received: from [148.252.241.226] (helo=xylophone.i.decadent.org.uk) by imap1.codethink.co.uk with esmtpsa (Exim 4.84_2 #1 (Debian)) id 1gMcEQ-0007bZ-9L for ; Tue, 13 Nov 2018 17:12:06 +0000 Date: Tue, 13 Nov 2018 17:12:04 +0000 From: Ben Hutchings To: dri-devel@lists.freedesktop.org Subject: [PATCH 2/5] drm: EDID: Fix bit masking of {X,Y}{OFFSET,PULSE} Message-ID: <20181113171204.ye4pjspiaygunwwo@xylophone.i.decadent.org.uk> References: <20181113171053.is24iz65egl22aw7@xylophone.i.decadent.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20181113171053.is24iz65egl22aw7@xylophone.i.decadent.org.uk> User-Agent: NeoMutt/20170113 (1.7.2) X-Mailman-Approved-At: Wed, 14 Nov 2018 08:16:04 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Currently we fail to encode any of these fields correctly if they are large enough to require the top 2 bits. Thankfully none of the EDID sources here are affected. The masking and shifting of the top 2 bits (out of 10 for X, 6 for Y) is only needed in one place so remove the msbs4() macro. Signed-off-by: Ben Hutchings --- Documentation/EDID/edid.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/Documentation/EDID/edid.S b/Documentation/EDID/edid.S index ce4b8b4a20b2..8abbf6c24d88 100644 --- a/Documentation/EDID/edid.S +++ b/Documentation/EDID/edid.S @@ -48,8 +48,6 @@ ((((v1-'@')&0x1f)<<10)+(((v2-'@')&0x1f)<<5)+((v3-'@')&0x1f)) #define swap16(v1) ((v1>>8)+((v1&0xff)<<8)) #define msbs2(v1,v2) ((((v1>>8)&0x0f)<<4)+((v2>>8)&0x0f)) -#define msbs4(v1,v2,v3,v4) \ - (((v1&0x03)>>2)+((v2&0x03)>>4)+((v3&0x03)>>6)+((v4&0x03)>>8)) #define pixdpi2mm(pix,dpi) ((pix*25)/dpi) #define xsize pixdpi2mm(XPIX,DPI) #define ysize pixdpi2mm(YPIX,DPI) @@ -202,12 +200,12 @@ x_snc_off_lsb: .byte XOFFSET&0xff x_snc_pls_lsb: .byte XPULSE&0xff /* Bits 7-4 Vertical sync offset lines 4 lsbits (0-63) Bits 3-0 Vertical sync pulse width lines 4 lsbits (0-63) */ -y_snc_lsb: .byte (YOFFSET<<4)+YPULSE +y_snc_lsb: .byte ((YOFFSET&0x0f)<<4)+(YPULSE&0x0f) /* Bits 7-6 Horizontal sync offset pixels 2 msbits Bits 5-4 Horizontal sync pulse width pixels 2 msbits Bits 3-2 Vertical sync offset lines 2 msbits Bits 1-0 Vertical sync pulse width lines 2 msbits */ -xy_snc_msbs: .byte msbs4(XOFFSET,XPULSE,YOFFSET,YPULSE) +xy_snc_msbs: .byte (((XOFFSET>>8)&3)<<6)+(((XPULSE>>8)&3)<<4)+(((YOFFSET>>4)&3)<<2)+((YPULSE>>4)&3) /* Horizontal display size, mm, 8 lsbits (0-4095 mm, 161 in) */ x_dsp_size: .byte xsize&0xff