From patchwork Sat Nov 17 17:27:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ayaka X-Patchwork-Id: 10688305 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ED68215A7 for ; Mon, 19 Nov 2018 09:06:26 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD368286C5 for ; Mon, 19 Nov 2018 09:06:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D0DD229918; Mon, 19 Nov 2018 09:06:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 6AF68286C5 for ; Mon, 19 Nov 2018 09:06:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E7F7A89CE2; Mon, 19 Nov 2018 09:06:20 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from kozue.soulik.info (kozue.soulik.info [108.61.200.231]) by gabe.freedesktop.org (Postfix) with ESMTPS id 994CB6E024 for ; Sat, 17 Nov 2018 17:27:18 +0000 (UTC) Received: from misaki.sumomo.pri (unknown [192.168.0.134]) by kozue.soulik.info (Postfix) with ESMTPA id 22749100F77; Sun, 18 Nov 2018 02:27:40 +0900 (JST) From: Randy Li To: dri-devel@lists.freedesktop.org Subject: [PATCH v2] drm/rockchip: support hwc layer Date: Sun, 18 Nov 2018 01:27:02 +0800 Message-Id: <20181117172702.16926-1-ayaka@soulik.info> X-Mailer: git-send-email 2.14.5 X-Mailman-Approved-At: Mon, 19 Nov 2018 09:05:53 +0000 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: airlied@linux.ie, Randy Li , linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The Windows 2/3 or a RGB UI layer is a high performance flexibly plane. It is too waste to use it as a cursor plane. I have verified this patch with weston git version, I am not sure whether X would meet with this patch. As the previous author is gone, I can't confirm this problem with him. Also the weston only use the only two achors with a same size and pixel format, I need more users to verify this patch. Signed-off-by: Randy Li --- drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 20 +++++++++++++ drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 44 ++++++++++++++++++++++++++--- 2 files changed, 60 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index 51bdc55b4b9c..1fa88000fab7 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -765,6 +765,26 @@ static void vop_plane_atomic_update(struct drm_plane *plane, dsp_info = (drm_rect_height(dest) - 1) << 16; dsp_info |= (drm_rect_width(dest) - 1) & 0xffff; + /* HWC layer only supports various of square icon */ + if (plane->type == DRM_PLANE_TYPE_CURSOR) { + switch (actual_w) { + case 32: + dsp_info = 0; + break; + case 64: + dsp_info = 0x1; + break; + case 94: + dsp_info = 0x10; + break; + case 128: + dsp_info = 0x11; + break; + /* Unsupported pixel resolution */ + default: + return; + } + } dsp_stx = dest->x1 + crtc->mode.htotal - crtc->mode.hsync_start; dsp_sty = dest->y1 + crtc->mode.vtotal - crtc->mode.vsync_start; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 6370f7d33273..6eba9ef78865 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -64,6 +64,15 @@ static const uint32_t formats_win_lite[] = { DRM_FORMAT_BGR565, }; +static const uint32_t formats_win_hwc[] = { + DRM_FORMAT_ARGB8888, + DRM_FORMAT_ABGR8888, + DRM_FORMAT_RGB888, + DRM_FORMAT_BGR888, + DRM_FORMAT_RGB565, + DRM_FORMAT_BGR565, +}; + static const struct vop_scl_regs rk3036_win_scl = { .scale_yrgb_x = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 0x0), .scale_yrgb_y = VOP_REG(RK3036_WIN0_SCL_FACTOR_YRGB, 0xffff, 16), @@ -458,6 +467,19 @@ static const struct vop_win_phy rk3288_win23_data = { .dst_alpha_ctl = VOP_REG(RK3288_WIN2_DST_ALPHA_CTRL, 0xff, 0), }; +static const struct vop_win_phy rk3288_winhwc_data = { + .data_formats = formats_win_hwc, + .nformats = ARRAY_SIZE(formats_win_hwc), + .enable = VOP_REG(RK3288_HWC_CTRL0, 0x1, 0), + .format = VOP_REG(RK3288_HWC_CTRL0, 0x7, 1), + .rb_swap = VOP_REG(RK3288_HWC_CTRL0, 0x1, 12), + .dsp_info = VOP_REG(RK3288_HWC_CTRL0, 0x3, 5), + .dsp_st = VOP_REG(RK3288_HWC_DSP_ST, 0x1fff1fff, 0), + .yrgb_mst = VOP_REG(RK3288_HWC_MST, 0xffffffff, 0), + .src_alpha_ctl = VOP_REG(RK3288_HWC_SRC_ALPHA_CTRL, 0xffff, 0), + .dst_alpha_ctl = VOP_REG(RK3288_HWC_DST_ALPHA_CTRL, 0xffffffff, 0), +}; + static const struct vop_modeset rk3288_modeset = { .htotal_pw = VOP_REG(RK3288_DSP_HTOTAL_HS_END, 0x1fff1fff, 0), .hact_st_end = VOP_REG(RK3288_DSP_HACT_ST_END, 0x1fff1fff, 0), @@ -502,7 +524,10 @@ static const struct vop_win_data rk3288_vop_win_data[] = { { .base = 0x00, .phy = &rk3288_win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, { .base = 0x50, .phy = &rk3288_win23_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x00, .phy = &rk3288_winhwc_data, + .type = DRM_PLANE_TYPE_CURSOR, + }, }; static const int rk3288_vop_intrs[] = { @@ -575,7 +600,10 @@ static const struct vop_win_data rk3368_vop_win_data[] = { { .base = 0x00, .phy = &rk3368_win23_data, .type = DRM_PLANE_TYPE_OVERLAY }, { .base = 0x50, .phy = &rk3368_win23_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x00, .phy = &rk3288_winhwc_data, + .type = DRM_PLANE_TYPE_CURSOR, + }, }; static const struct vop_output rk3368_output = { @@ -654,8 +682,13 @@ static const struct vop_data rk3399_vop_big = { static const struct vop_win_data rk3399_vop_lit_win_data[] = { { .base = 0x00, .phy = &rk3288_win01_data, .type = DRM_PLANE_TYPE_PRIMARY }, + { .phy = NULL}, { .base = 0x00, .phy = &rk3368_win23_data, - .type = DRM_PLANE_TYPE_CURSOR}, + .type = DRM_PLANE_TYPE_OVERLAY}, + { .phy = NULL}, + { .base = 0x00, .phy = &rk3288_winhwc_data, + .type = DRM_PLANE_TYPE_CURSOR, + }, }; static const struct vop_data rk3399_vop_lit = { @@ -737,7 +770,10 @@ static const struct vop_win_data rk3328_vop_win_data[] = { { .base = 0x1d0, .phy = &rk3288_win01_data, .type = DRM_PLANE_TYPE_OVERLAY }, { .base = 0x2d0, .phy = &rk3288_win01_data, - .type = DRM_PLANE_TYPE_CURSOR }, + .type = DRM_PLANE_TYPE_OVERLAY }, + { .base = 0x3d0, .phy = &rk3288_winhwc_data, + .type = DRM_PLANE_TYPE_CURSOR, + }, }; static const struct vop_data rk3328_vop = {