diff mbox series

[7/7] arm64: tegra: Enable HDMI on P2972-0000

Message ID 20181123123138.20739-7-thierry.reding@gmail.com (mailing list archive)
State New, archived
Headers show
Series [1/7] gpu: host1x: Resize channel register region on Tegra186 and later | expand

Commit Message

Thierry Reding Nov. 23, 2018, 12:31 p.m. UTC 
From: Thierry Reding <treding@nvidia.com>

Add the 5V HDMI regulator and hook up the VDD_1V0 and VDD_1V8HS supplies
from the PMIC to the display block. Also enable the display hub which is
responsible for instantiating the display controllers. Finally, enable
the third SOR that drives the TMDS signals to the HDMI connector.

Signed-off-by: Thierry Reding <treding@nvidia.com>
---
 .../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 15 +++++++++--
 .../boot/dts/nvidia/tegra194-p2972-0000.dts   | 25 +++++++++++++++++++
 2 files changed, 38 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index 57d3f00464ce..204a207ff4bd 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -163,7 +163,7 @@ 
 					in-ldo4-6-supply = <&vdd_5v0_sys>;
 					in-ldo7-8-supply = <&vdd_1v8ls>;
 
-					sd0 {
+					vdd_1v0: sd0 {
 						regulator-name = "VDD_1V0";
 						regulator-min-microvolt = <1000000>;
 						regulator-max-microvolt = <1000000>;
@@ -171,7 +171,7 @@ 
 						regulator-boot-on;
 					};
 
-					sd1 {
+					vdd_1v8hs: sd1 {
 						regulator-name = "VDD_1V8HS";
 						regulator-min-microvolt = <1800000>;
 						regulator-max-microvolt = <1800000>;
@@ -262,5 +262,16 @@ 
 			regulator-always-on;
 			regulator-boot-on;
 		};
+
+		vdd_hdmi: regulator@1 {
+			compatible = "regulator-fixed";
+			reg = <1>;
+
+			regulator-name = "VDD_5V0_HDMI_CON";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
+			enable-active-high;
+		};
 	};
 };
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 86f05504ca38..cbae8e8b1281 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -13,6 +13,31 @@ 
 			status = "okay";
 		};
 
+		host1x@13e00000 {
+			display-hub@15200000 {
+				status = "okay";
+			};
+
+			dpaux@155e0000 {
+				status = "okay";
+			};
+
+			sor@15b80000 {
+				status = "okay";
+
+				avdd-io-supply = <&vdd_1v0>;
+				vdd-pll-supply = <&vdd_1v8hs>;
+				hdmi-supply = <&vdd_hdmi>;
+
+				nvidia,ddc-i2c-bus = <&ddc>;
+				nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 2) GPIO_ACTIVE_LOW>;
+			};
+		};
+
+		ddc: i2c@31c0000 {
+			status = "okay";
+		};
+
 		pwm@c340000 {
 			status = "okay";
 		};