diff mbox series

[4/4] drm/i915: DDI: call intel_edp_drrs_enable() on encoder updates

Message ID 20181218222944.9186-4-hdegoede@redhat.com (mailing list archive)
State New, archived
Headers show
Series [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets | expand

Commit Message

Hans de Goede Dec. 18, 2018, 10:29 p.m. UTC
Call intel_edp_drrs_enable() on encoder updates to make sure that we enable
DRRS (when applicable) on fastsets.

Note calling intel_edp_drrs_enable() when PSR has already been enabled is a
no-op, so it is safe to do this on every encoder->update callback.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Maarten Lankhorst Dec. 19, 2018, 9:55 a.m. UTC | #1
Op 18-12-2018 om 23:29 schreef Hans de Goede:
> Call intel_edp_drrs_enable() on encoder updates to make sure that we enable
> DRRS (when applicable) on fastsets.
>
> Note calling intel_edp_drrs_enable() when PSR has already been enabled is a
> no-op, so it is safe to do this on every encoder->update callback.
>
> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 30f54c334dd7..b74f3c415fbb 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -3544,6 +3544,7 @@ static void intel_update_ddi_dp(struct intel_encoder *encoder,
>  	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>  
>  	intel_psr_enable(intel_dp, crtc_state);
> +	intel_edp_drrs_enable(intel_dp, crtc_state);
>  }
>  
>  static void intel_update_ddi(struct intel_encoder *encoder,

I would merge patch 2 and 4, and rename the callback to pipe_update or something less generic than update, at least.

Other than that, looks good. So with those changes:

Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Can I convince you to review https://patchwork.freedesktop.org/series/54226/ ? Should be triggerable with

kms_atomic_transition --run-subtest plane-all-modeset-transition-fencing-internal-panels

See:

https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_11112/shard-skl7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

At that point we should have FBC, PSR and DRRS working correctly with fastset. :)

~Maarten
Hans de Goede Dec. 19, 2018, 10:55 a.m. UTC | #2
Hi,

On 19-12-18 10:55, Maarten Lankhorst wrote:
> Op 18-12-2018 om 23:29 schreef Hans de Goede:
>> Call intel_edp_drrs_enable() on encoder updates to make sure that we enable
>> DRRS (when applicable) on fastsets.
>>
>> Note calling intel_edp_drrs_enable() when PSR has already been enabled is a
>> no-op, so it is safe to do this on every encoder->update callback.
>>
>> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
>> ---
>>   drivers/gpu/drm/i915/intel_ddi.c | 1 +
>>   1 file changed, 1 insertion(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
>> index 30f54c334dd7..b74f3c415fbb 100644
>> --- a/drivers/gpu/drm/i915/intel_ddi.c
>> +++ b/drivers/gpu/drm/i915/intel_ddi.c
>> @@ -3544,6 +3544,7 @@ static void intel_update_ddi_dp(struct intel_encoder *encoder,
>>   	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
>>   
>>   	intel_psr_enable(intel_dp, crtc_state);
>> +	intel_edp_drrs_enable(intel_dp, crtc_state);
>>   }
>>   
>>   static void intel_update_ddi(struct intel_encoder *encoder,
> 
> I would merge patch 2 and 4, and rename the callback to pipe_update or something less generic than update, at least.
> 
> Other than that, looks good. So with those changes:
> 
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

Thank you, I agree with the suggested changes. I'm not sure if I will get
around to doing a v2 with the changes today.

> Can I convince you to review https://patchwork.freedesktop.org/series/54226/ ? Should be triggerable with
> 
> kms_atomic_transition --run-subtest plane-all-modeset-transition-fencing-internal-panels

Sure, but again I likely will not get around to this until tomorrow.

> At that point we should have FBC, PSR and DRRS working correctly with fastset. :)

Sounds good :)

Regards,

Hans
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 30f54c334dd7..b74f3c415fbb 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -3544,6 +3544,7 @@  static void intel_update_ddi_dp(struct intel_encoder *encoder,
 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
 
 	intel_psr_enable(intel_dp, crtc_state);
+	intel_edp_drrs_enable(intel_dp, crtc_state);
 }
 
 static void intel_update_ddi(struct intel_encoder *encoder,