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Fri, 21 Dec 2018 09:59:17 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B0776F59F; Fri, 21 Dec 2018 09:59:16 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from EUR04-DB3-obe.outbound.protection.outlook.com (mail-eopbgr60050.outbound.protection.outlook.com [40.107.6.50]) by gabe.freedesktop.org (Postfix) with ESMTPS id 281BC6F59F for ; Fri, 21 Dec 2018 09:59:15 +0000 (UTC) Received: from AM0PR08MB4483.eurprd08.prod.outlook.com (20.179.35.149) by AM0PR08MB3187.eurprd08.prod.outlook.com (52.134.93.156) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.1446.19; Fri, 21 Dec 2018 09:59:12 +0000 Received: from AM0PR08MB4483.eurprd08.prod.outlook.com ([fe80::1dff:434f:5905:45db]) by AM0PR08MB4483.eurprd08.prod.outlook.com ([fe80::1dff:434f:5905:45db%5]) with mapi id 15.20.1446.020; Fri, 21 Dec 2018 09:59:12 +0000 From: "james qian wang (Arm Technology China)" To: Liviu Dudau Subject: [PATCH v3 2/9] dt/bindings: drm/komeda: Add DT bindings for ARM display processor D71 Thread-Topic: [PATCH v3 2/9] dt/bindings: drm/komeda: Add DT bindings for ARM display processor D71 Thread-Index: AQHUmRPTBdPt1uc570uDsKJLIqlNSA== Date: Fri, 21 Dec 2018 09:59:12 +0000 Message-ID: <20181221095757.15510-3-james.qian.wang@arm.com> References: <20181221095757.15510-1-james.qian.wang@arm.com> In-Reply-To: <20181221095757.15510-1-james.qian.wang@arm.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [113.29.88.7] x-clientproxiedby: SY3PR01CA0099.ausprd01.prod.outlook.com (2603:10c6:0:19::32) To AM0PR08MB4483.eurprd08.prod.outlook.com (2603:10a6:208:145::21) x-ms-exchange-messagesentrepresentingtype: 1 x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR08MB3187; H:AM0PR08MB4483.eurprd08.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: arm.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: Mg+TS1idSpEEqw/XW8IiRaZnoZqbaqbJO3mot4xHfOx5WAASYiQWMWjrWen/RPXjnBG3LNtmP8AjlySqJ5FFiYUKWRzggUblYVVOpqrhVDspsi4M1yAwGqPQ+mOlUZHbFebX0O95jAK1CsTZIDdKAZq9y/lnAo+PdkL3pZmQWnsuzoaxwSvs8NZilI5Cu/NoQ9ITMRnhR+GdC08PA/W/m9dgNWIx3suirii3zKevHdWsjiLynwAkHY94QrRp9+xeGBa3jDvvM28SpJBgpWNdidI+KZz+mz+HpVHIxCFAGmIZ90NcRG1lrzCZ/pZRD8wX spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM MIME-Version: 1.0 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-Network-Message-Id: fdfb71a1-5b1a-4c56-f020-08d6672af552 X-MS-Exchange-CrossTenant-originalarrivaltime: 21 Dec 2018 09:59:12.5077 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR08MB3187 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , "linux-doc@vger.kernel.org" , "maxime.ripard@bootlin.com" , "Jonathan Chai \(Arm Technology China\)" , Alexandru-Cosmin Gheorghe , "dri-devel@lists.freedesktop.org" , "linux-kernel@vger.kernel.org" , "yamada.masahiro@socionext.com" , "Yiqi Kang \(Arm Technology China\)" , "mchehab+samsung@kernel.org" , "Tiannan Zhu \(Arm Technology China\)" , "corbet@lwn.net" , "airlied@linux.ie" , "malidp@foss.arm.com" , "thomas Sun \(Arm Technology China\)" , Ayan Halder , "devicetree@vger.kernel.org" , "arnd@arndb.de" , "robh+dt@kernel.org" , "Jin Gao \(Arm Technology China\)" , nd , "sean@poorly.run" , "Lowry Li \(Arm Technology China\)" , "gregkh@linuxfoundation.org" , "rdunlap@infradead.org" , "nicolas.ferre@microchip.com" , "Julien Yin \(Arm Technology China\)" , "james qian wang \(Arm Technology China\)" , "akpm@linux-foundation.org" , "davem@davemloft.net" Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP Add DT bindings documentation for the ARM display processor D71 and later IPs. Signed-off-by: James (Qian) Wang Changes in v3: - Deleted unnecessary property: interrupt-names. - Dropped 'ports' and moving 'port' up a level. Reviewed-by: Liviu Dudau --- .../bindings/display/arm/arm,komeda.txt | 79 +++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/arm/arm,komeda.txt diff --git a/Documentation/devicetree/bindings/display/arm/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm/arm,komeda.txt new file mode 100644 index 000000000000..b4e450243c7d --- /dev/null +++ b/Documentation/devicetree/bindings/display/arm/arm,komeda.txt @@ -0,0 +1,79 @@ +Device Tree bindings for ARM Komeda display driver + +Required properties: +- compatible: Should be "arm,mali-d71" +- reg: Physical base address and length of the registers in the system +- interrupts: the interrupt line number of the device in the system +- clocks: A list of phandle + clock-specifier pairs, one for each entry + in 'clock-names' +- clock-names: A list of clock names. It should contain: + - "mclk": for the main processor clock + - "pclk": for the APB interface clock +- #address-cells: Must be 1 +- #size-cells: Must be 0 + +Required properties for sub-node: pipeline@nq +Each device contains one or two pipeline sub-nodes (at least one), each +pipeline node should provide properties: +- reg: Zero-indexed identifier for the pipeline +- clocks: A list of phandle + clock-specifier pairs, one for each entry + in 'clock-names' +- clock-names: should contain: + - "pxclk": pixel clock + - "aclk": AXI interface clock + +- port: each pipeline connect to an encoder input port. The connection is + modeled using the OF graph bindings specified in + Documentation/devicetree/bindings/graph.txt + +Optional properties: + - memory-region: phandle to a node describing memory (see + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) + to be used for the framebuffer; if not present, the framebuffer may + be located anywhere in memory. + +Example: +/ { + ... + + dp0: display@c00000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "arm,mali-d71"; + reg = <0xc00000 0x20000>; + interrupts = <0 168 4>; + clocks = <&dpu_mclk>, <&dpu_aclk>; + clock-names = "mclk", "pclk"; + + dp0_pipe0: pipeline@0 { + clocks = <&fpgaosc2>, <&dpu_aclk>; + clock-names = "pxclk", "aclk"; + reg = <0>; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + dp0_pipe0_out: endpoint { + remote-endpoint = <&db_dvi0_in>; + }; + }; + }; + + dp0_pipe1: pipeline@1 { + clocks = <&fpgaosc2>, <&dpu_aclk>; + clock-names = "pxclk", "aclk"; + reg = <1>; + + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + dp0_pipe1_out: endpoint { + remote-endpoint = <&db_dvi1_in>; + }; + }; + }; + }; + ... +};