From patchwork Thu Jan 24 18:02:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 10779807 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AC8B313BF for ; Thu, 24 Jan 2019 18:03:28 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C930327B7 for ; Thu, 24 Jan 2019 18:03:28 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A897327C9; Thu, 24 Jan 2019 18:03:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0AFF332848 for ; Thu, 24 Jan 2019 18:03:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 9FEE86F20A; Thu, 24 Jan 2019 18:03:21 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) by gabe.freedesktop.org (Postfix) with ESMTPS id 56F086F204 for ; Thu, 24 Jan 2019 18:03:18 +0000 (UTC) Received: by mail-wm1-x341.google.com with SMTP id f188so4019569wmf.5 for ; Thu, 24 Jan 2019 10:03:18 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HPOPCXFDiNcBGfdMIFvBG5hPlr1DOqtpoZb3a/W3MYw=; b=XEl5WasJbwufDW2ukFXkGsyeSwwZAPPvOPEVEUkY/EfmpFrhn3J6HGqJcXQn0UwWYr cYmaYFRmFf9DZfDhd5zZpByYo9RPw0ie6UseeXeK1Nz2Q0LNyc0M5ByPNoP9HNrZ3wsw IIuRXT1Zjj4MqOeY0zibkrK1QS/YX0azXJLhZFc29Sbp0ap985ivnR4BggVhji0Nhv3n o06rj65eJu3p/mQmZfqs+m23Ss+aXUKhqvoRf2jHqaZM2ZZvISlj1pOSa16x/nfEaLo6 ngrVjtpW1eIEYE+bbmuuqlHUuSbzZRS9U86j6y2xdqV+WqZ+TbRWKdI689GKZOpUJ6dN PtJQ== X-Gm-Message-State: AJcUukei4OrrLZqKdiNW7lGUYCKEnF9+LQHhdx69FsNioMbzhJiCnE+3 mKUVN1u9gQFJOJDw93RNNTpoUs+dfnA= X-Google-Smtp-Source: ALg8bN5tz/pyhZTwyxvo/6rgPvXmqKnaa/PN7wuR+LRs1cC0Sh3WjVDHYkdGGsZKDn36jqpXqJgmPw== X-Received: by 2002:a1c:8095:: with SMTP id b143mr3533214wmd.63.1548352996421; Thu, 24 Jan 2019 10:03:16 -0800 (PST) Received: from localhost (pD9E51040.dip0.t-ipconnect.de. [217.229.16.64]) by smtp.gmail.com with ESMTPSA id t18sm38215683wmt.35.2019.01.24.10.03.15 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 24 Jan 2019 10:03:15 -0800 (PST) From: Thierry Reding To: Thierry Reding Subject: [PATCH v2 12/13] drm/tegra: vic: Support stream ID register programming Date: Thu, 24 Jan 2019 19:02:53 +0100 Message-Id: <20190124180254.20080-13-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190124180254.20080-1-thierry.reding@gmail.com> References: <20190124180254.20080-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, Dmitry Osipenko , dri-devel@lists.freedesktop.org, Mikko Perttunen Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding The version of VIC found in Tegra186 and later incorporates improvements with regards to context isolation. As part of those improvements, stream ID registers were added that allow to specify separate stream IDs for the Falcon microcontroller and the VIC memory interface. While it is possible to also set the stream ID dynamically at runtime to allow userspace contexts to be completely separated, this commit doesn't implement that yet. Instead, the static VIC stream ID is programmed when the Falcon is booted. This ensures that memory accesses by the Falcon or the VIC are properly translated via the SMMU. Signed-off-by: Thierry Reding --- drivers/gpu/drm/tegra/vic.c | 21 +++++++++++++++++++++ drivers/gpu/drm/tegra/vic.h | 9 +++++++++ 2 files changed, 30 insertions(+) diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c index d20fcbf6196d..a615be2c02e1 100644 --- a/drivers/gpu/drm/tegra/vic.c +++ b/drivers/gpu/drm/tegra/vic.c @@ -26,6 +26,7 @@ struct vic_config { const char *firmware; unsigned int version; + bool supports_sid; }; struct vic { @@ -105,6 +106,22 @@ static int vic_boot(struct vic *vic) if (vic->booted) return 0; + if (vic->config->supports_sid) { + struct iommu_fwspec *spec = dev_iommu_fwspec_get(vic->dev); + u32 value; + + value = TRANSCFG_ATT(1, TRANSCFG_SID_FALCON) | + TRANSCFG_ATT(0, TRANSCFG_SID_HW); + vic_writel(vic, value, VIC_TFBIF_TRANSCFG); + + if (spec->num_ids > 0) { + value = spec->ids[0] & 0xffff; + + vic_writel(vic, value, VIC_THI_STREAMID0); + vic_writel(vic, value, VIC_THI_STREAMID1); + } + } + /* setup clockgating registers */ vic_writel(vic, CG_IDLE_CG_DLY_CNT(4) | CG_IDLE_CG_EN | @@ -314,6 +331,7 @@ static const struct tegra_drm_client_ops vic_ops = { static const struct vic_config vic_t124_config = { .firmware = NVIDIA_TEGRA_124_VIC_FIRMWARE, .version = 0x40, + .supports_sid = false, }; #define NVIDIA_TEGRA_210_VIC_FIRMWARE "nvidia/tegra210/vic04_ucode.bin" @@ -321,6 +339,7 @@ static const struct vic_config vic_t124_config = { static const struct vic_config vic_t210_config = { .firmware = NVIDIA_TEGRA_210_VIC_FIRMWARE, .version = 0x21, + .supports_sid = false, }; #define NVIDIA_TEGRA_186_VIC_FIRMWARE "nvidia/tegra186/vic04_ucode.bin" @@ -328,6 +347,7 @@ static const struct vic_config vic_t210_config = { static const struct vic_config vic_t186_config = { .firmware = NVIDIA_TEGRA_186_VIC_FIRMWARE, .version = 0x18, + .supports_sid = true, }; #define NVIDIA_TEGRA_194_VIC_FIRMWARE "nvidia/tegra194/vic.bin" @@ -335,6 +355,7 @@ static const struct vic_config vic_t186_config = { static const struct vic_config vic_t194_config = { .firmware = NVIDIA_TEGRA_194_VIC_FIRMWARE, .version = 0x19, + .supports_sid = true, }; static const struct of_device_id vic_match[] = { diff --git a/drivers/gpu/drm/tegra/vic.h b/drivers/gpu/drm/tegra/vic.h index 21844817a7e1..017584340dd6 100644 --- a/drivers/gpu/drm/tegra/vic.h +++ b/drivers/gpu/drm/tegra/vic.h @@ -17,11 +17,20 @@ /* VIC registers */ +#define VIC_THI_STREAMID0 0x00000030 +#define VIC_THI_STREAMID1 0x00000034 + #define NV_PVIC_MISC_PRI_VIC_CG 0x000016d0 #define CG_IDLE_CG_DLY_CNT(val) ((val & 0x3f) << 0) #define CG_IDLE_CG_EN (1 << 6) #define CG_WAKEUP_DLY_CNT(val) ((val & 0xf) << 16) +#define VIC_TFBIF_TRANSCFG 0x00002044 +#define TRANSCFG_ATT(i, v) (((v) & 0x3) << (i * 4)) +#define TRANSCFG_SID_HW 0 +#define TRANSCFG_SID_PHY 1 +#define TRANSCFG_SID_FALCON 2 + /* Firmware offsets */ #define VIC_UCODE_FCE_HEADER_OFFSET (6*4)