From patchwork Thu Jan 24 18:02:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 10779789 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 50FD713BF for ; Thu, 24 Jan 2019 18:03:12 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 454AD326D0 for ; Thu, 24 Jan 2019 18:03:12 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 427A8327BA; Thu, 24 Jan 2019 18:03:12 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_ADSP_CUSTOM_MED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 0596832839 for ; Thu, 24 Jan 2019 18:03:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 71DA06F1FD; Thu, 24 Jan 2019 18:03:07 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3A9756F1FD for ; Thu, 24 Jan 2019 18:03:06 +0000 (UTC) Received: by mail-wr1-x443.google.com with SMTP id v13so7496925wrw.5 for ; Thu, 24 Jan 2019 10:03:06 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H6oxxYeF69Pq45FSTtSVXJ7NZYF5O9gE4IxYJVdAZDA=; b=sHWsYGLEqcwdqKpne409MMNgj+3aEtbgqMGjMpOm5Eu7vtqgXPOxtlwznoF68CrkBz 3y0a+M5Th0eyhL2hLpZVx+5HNEg4MYVh7k6dl72sdOM3LAVN9xZJ0HT4HmHzDeFio4bW w328bjqDG+ULT7tLDmnTsQugUCR2cO+L1Bo5dnxrvcadODrJX9aMJkkI1LtXtBWD0xiw 6XTMGnVMOO3uXHtWbF82GFMygBYz1mtcbyT4JlaDZzPu+6BHsH1qM8aYEWGnjvI3XvPx HtDcVeJT9V0LvgP8ZyaSAJZ2WQ9QvtJ8j2ur9AAlfMeez219c3JC8lJpI4zq5O1Of8Rq AfFg== X-Gm-Message-State: AJcUukdu577BaygiUh63FIiljmdCvxsc/h1LQtB80V623LFSscO+Z/8f uaPglbFJNzEFoGeNWDNVdQY= X-Google-Smtp-Source: ALg8bN4fOf6giratZmA90R5RNe9cjFO96sdQ3xSH3BWkx6aT93WWDVvLZGSvFwsh6CHCaA6dMRC9NA== X-Received: by 2002:adf:f5d1:: with SMTP id k17mr8746558wrp.59.1548352984596; Thu, 24 Jan 2019 10:03:04 -0800 (PST) Received: from localhost (pD9E51040.dip0.t-ipconnect.de. [217.229.16.64]) by smtp.gmail.com with ESMTPSA id a12sm111632660wro.18.2019.01.24.10.03.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 24 Jan 2019 10:03:03 -0800 (PST) From: Thierry Reding To: Thierry Reding Subject: [PATCH v2 05/13] gpu: host1x: Restrict IOVA space to DMA mask Date: Thu, 24 Jan 2019 19:02:46 +0100 Message-Id: <20190124180254.20080-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190124180254.20080-1-thierry.reding@gmail.com> References: <20190124180254.20080-1-thierry.reding@gmail.com> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, Dmitry Osipenko , dri-devel@lists.freedesktop.org, Mikko Perttunen Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding On Tegra186 and later, the ARM SMMU provides an input address space that is 48 bits wide. However, memory clients can only address up to 40 bits. If the geometry is used as-is, allocations of IOVA space can end up in a region that is not addressable by the memory clients. To fix this, restrict the IOVA space to the DMA mask of the host1x device. Signed-off-by: Thierry Reding --- drivers/gpu/host1x/dev.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c index 4c044ee54fe6..544b67f2b3ff 100644 --- a/drivers/gpu/host1x/dev.c +++ b/drivers/gpu/host1x/dev.c @@ -283,6 +283,8 @@ static int host1x_probe(struct platform_device *pdev) host->group = iommu_group_get(&pdev->dev); if (host->group) { struct iommu_domain_geometry *geometry; + u64 mask = dma_get_mask(host->dev); + dma_addr_t start, end; unsigned long order; err = iova_cache_get(); @@ -310,11 +312,12 @@ static int host1x_probe(struct platform_device *pdev) } geometry = &host->domain->geometry; + start = geometry->aperture_start & mask; + end = geometry->aperture_end & mask; order = __ffs(host->domain->pgsize_bitmap); - init_iova_domain(&host->iova, 1UL << order, - geometry->aperture_start >> order); - host->iova_end = geometry->aperture_end; + init_iova_domain(&host->iova, 1UL << order, start >> order); + host->iova_end = end; } skip_iommu: