Message ID | 20190212204109.3528-1-jagan@amarulasolutions.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v7,1/2] dt-bindings: panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel | expand |
On Wed, Feb 13, 2019 at 02:11:08AM +0530, Jagan Teki wrote: > Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel. > > Add dt-bingings for it. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > Reviewed-by: Rob Herring <robh@kernel.org> > --- > Changes for v7, v6, v5, v4, v3: > - none > Changes for v2: > - new patch, derived from another dsi series > > .../display/panel/feiyang,fy07024di26a30d.txt | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt Applied, thanks. Thierry
diff --git a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt new file mode 100644 index 000000000000..82caa7b65ae8 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt @@ -0,0 +1,20 @@ +Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel + +Required properties: +- compatible: must be "feiyang,fy07024di26a30d" +- reg: DSI virtual channel used by that screen +- avdd-supply: analog regulator dc1 switch +- dvdd-supply: 3v3 digital regulator +- reset-gpios: a GPIO phandle for the reset pin + +Optional properties: +- backlight: phandle for the backlight control. + +panel@0 { + compatible = "feiyang,fy07024di26a30d"; + reg = <0>; + avdd-supply = <®_dc1sw>; + dvdd-supply = <®_dldo2>; + reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */ + backlight = <&backlight>; +};