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Thu, 14 Mar 2019 04:15:14 -0700 (PDT) Received: from localhost.localdomain ([150.109.119.235]) by smtp.gmail.com with ESMTPSA id c13sm36732367pfm.34.2019.03.14.04.15.11 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Mar 2019 04:15:13 -0700 (PDT) From: Qiang Yu To: dri-devel@lists.freedesktop.org Subject: [PATCH v3] drm/fourcc: add ARM GPU tile modifier Date: Thu, 14 Mar 2019 19:13:48 +0800 Message-Id: <20190314111348.2218-1-yuq825@gmail.com> X-Mailer: git-send-email 2.17.1 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=xatUdqkI6HvBI3HM1MeaVKyW7Or5MWDd/JK2S8rIOTE=; b=BGWSvZS9SPbI/qoGnVxEsL21rW5wHMWlV1ac3hHhZmh4o/140xiq9EftILxwTcr1pi ITS6BdLIThiusHt9XoLl3H/PXvmvg/Bj41bHbG8X7lXUTv3AfFjcdRadbWirhMcywIVp bIosQQepeQEy+d2EP9eOy7h9z+RBLnFpira+ay+nwQldv2PlDLBcGLN3ZKjdgCF73oS+ MqvYSFmCdsoaZZZoaxN4s3k+wyebx9rDTwMSMLT05og2MfjpzVUYIx6+TNsoj0C09m77 9aZqBsXxGwOS7UHdCvFkV1wkTMQDbR8P3S/mZ4Xr/ZmpgCmFTUxbmzuowfNAoLda1Lrp DcxA== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lima@lists.freedesktop.org, Maxime Ripard , David Airlie , Qiang Yu , Ayan Halder , Sean Paul , Alyssa Rosenzweig MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP v2: separate AFBC and GPU encoding v3: rename device to type and GPU modifer name Cc: Brian Starkey Cc: Rob Herring Cc: Alyssa Rosenzweig Cc: Ayan Halder Signed-off-by: Qiang Yu Reviewed-by: Alyssa Rosenzweig --- include/uapi/drm/drm_fourcc.h | 31 ++++++++++++++++++++++++++++++- 1 file changed, 30 insertions(+), 1 deletion(-) diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h index 9fa7cf7bb274..f80a675cb09a 100644 --- a/include/uapi/drm/drm_fourcc.h +++ b/include/uapi/drm/drm_fourcc.h @@ -601,6 +601,19 @@ extern "C" { */ #define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6) +/* + * Arm Buffer Layout Type Code + * + * Arm has multiple types of buffer layout which are not totally shared + * across devices, so add a type field at the MSB of the format field + * to separate each type's encoding. + */ +#define DRM_FORMAT_MOD_ARM_TYPE_AFBC 0x00 +#define DRM_FORMAT_MOD_ARM_TYPE_AGTB 0x01 + +#define DRM_FORMAT_MOD_ARM_CODE(type, val) \ + fourcc_mod_code(ARM, ((__u64)type << 48) | ((val) & 0x0000ffffffffffffULL)) + /* * Arm Framebuffer Compression (AFBC) modifiers * @@ -615,7 +628,8 @@ extern "C" { * Further information on the use of AFBC modifiers can be found in * Documentation/gpu/afbc.rst */ -#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM, __afbc_mode) +#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \ + DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AFBC, __afbc_mode) /* * AFBC superblock size @@ -709,6 +723,21 @@ extern "C" { */ #define AFBC_FORMAT_MOD_BCH (1ULL << 11) +/* + * Arm Graphics Tiled Buffer (AGTB) modifiers + */ +#define DRM_FORMAT_MOD_ARM_AGTB(mode) \ + DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AGTB, mode) + +/* + * AGTB mode 0 modifier + * + * This is used by ARM Mali Utgard/Midgard GPU. It divides buffer into + * 16x16 pixel blocks. Blocks are stored linearly in order, but pixels + * in the block are reordered. + */ +#define DRM_FORMAT_MOD_ARM_AGTB_MODE0 DRM_FORMAT_MOD_ARM_AGTB(1) + /* * Allwinner tiled modifier *