diff mbox series

[1/4] drm/v3d: Fix debugfs reads of MMU regs.

Message ID 20190419001014.23579-1-eric@anholt.net (mailing list archive)
State New, archived
Headers show
Series [1/4] drm/v3d: Fix debugfs reads of MMU regs. | expand

Commit Message

Eric Anholt April 19, 2019, 12:10 a.m. UTC
They're in the hub, not the individual cores.

Signed-off-by: Eric Anholt <eric@anholt.net>
---
 drivers/gpu/drm/v3d/v3d_debugfs.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

Comments

Paul Kocialkowski April 19, 2019, 8:47 a.m. UTC | #1
Hi,

On Thu, 2019-04-18 at 17:10 -0700, Eric Anholt wrote:
> They're in the hub, not the individual cores.

Although I don't have docs to check, looks sane:

Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>

Cheers,

Paul

> Signed-off-by: Eric Anholt <eric@anholt.net>
> ---
>  drivers/gpu/drm/v3d/v3d_debugfs.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c b/drivers/gpu/drm/v3d/v3d_debugfs.c
> index a2dc4262955e..356a8acfa72d 100644
> --- a/drivers/gpu/drm/v3d/v3d_debugfs.c
> +++ b/drivers/gpu/drm/v3d/v3d_debugfs.c
> @@ -26,6 +26,10 @@ static const struct v3d_reg_def v3d_hub_reg_defs[] = {
>  	REGDEF(V3D_HUB_IDENT3),
>  	REGDEF(V3D_HUB_INT_STS),
>  	REGDEF(V3D_HUB_INT_MSK_STS),
> +
> +	REGDEF(V3D_MMU_CTL),
> +	REGDEF(V3D_MMU_VIO_ADDR),
> +	REGDEF(V3D_MMU_VIO_ID),
>  };
>  
>  static const struct v3d_reg_def v3d_gca_reg_defs[] = {
> @@ -50,9 +54,6 @@ static const struct v3d_reg_def v3d_core_reg_defs[] = {
>  	REGDEF(V3D_PTB_BPCA),
>  	REGDEF(V3D_PTB_BPCS),
>  
> -	REGDEF(V3D_MMU_CTL),
> -	REGDEF(V3D_MMU_VIO_ADDR),
> -
>  	REGDEF(V3D_GMP_STATUS),
>  	REGDEF(V3D_GMP_CFG),
>  	REGDEF(V3D_GMP_VIO_ADDR),
diff mbox series

Patch

diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c b/drivers/gpu/drm/v3d/v3d_debugfs.c
index a2dc4262955e..356a8acfa72d 100644
--- a/drivers/gpu/drm/v3d/v3d_debugfs.c
+++ b/drivers/gpu/drm/v3d/v3d_debugfs.c
@@ -26,6 +26,10 @@  static const struct v3d_reg_def v3d_hub_reg_defs[] = {
 	REGDEF(V3D_HUB_IDENT3),
 	REGDEF(V3D_HUB_INT_STS),
 	REGDEF(V3D_HUB_INT_MSK_STS),
+
+	REGDEF(V3D_MMU_CTL),
+	REGDEF(V3D_MMU_VIO_ADDR),
+	REGDEF(V3D_MMU_VIO_ID),
 };
 
 static const struct v3d_reg_def v3d_gca_reg_defs[] = {
@@ -50,9 +54,6 @@  static const struct v3d_reg_def v3d_core_reg_defs[] = {
 	REGDEF(V3D_PTB_BPCA),
 	REGDEF(V3D_PTB_BPCS),
 
-	REGDEF(V3D_MMU_CTL),
-	REGDEF(V3D_MMU_VIO_ADDR),
-
 	REGDEF(V3D_GMP_STATUS),
 	REGDEF(V3D_GMP_CFG),
 	REGDEF(V3D_GMP_VIO_ADDR),