diff mbox series

[PATCHv3,12/23] drm/bridge: tc358767: ensure DP is disabled before LT

Message ID 20190503122949.12266-13-tomi.valkeinen@ti.com (mailing list archive)
State New, archived
Headers show
Series drm/bridge: tc358767: DP support | expand

Commit Message

Tomi Valkeinen May 3, 2019, 12:29 p.m. UTC
Link training will sometimes fail if the DP link is enabled when
tc_main_link_enable() is called. The driver makes sure the DP link is
disabled when the DP output is disabled, and we never enable the DP
without first disabling it, so this should never happen.

However, as the HW behavior seems to be somewhat random if DP link has
erroneously been left enabled, let's add a WARN_ON() for the case and
set DP0CTL to 0.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
---
 drivers/gpu/drm/bridge/tc358767.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Andrzej Hajda May 20, 2019, 10:54 a.m. UTC | #1
On 03.05.2019 14:29, Tomi Valkeinen wrote:
> Link training will sometimes fail if the DP link is enabled when
> tc_main_link_enable() is called. The driver makes sure the DP link is
> disabled when the DP output is disabled, and we never enable the DP
> without first disabling it, so this should never happen.
>
> However, as the HW behavior seems to be somewhat random if DP link has
> erroneously been left enabled, let's add a WARN_ON() for the case and
> set DP0CTL to 0.
>
> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>

 --
Regards
Andrzej
diff mbox series

Patch

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index 86e2e16c5a90..cec825600158 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -839,6 +839,10 @@  static int tc_main_link_enable(struct tc_data *tc)
 
 	dev_dbg(tc->dev, "link enable\n");
 
+	tc_read(DP0CTL, &value);
+	if (WARN_ON(value != 0))
+		tc_write(DP0CTL, 0);
+
 	tc_write(DP0_SRCCTRL, tc_srcctrl(tc));
 	/* SSCG and BW27 on DP1 must be set to the same as on DP0 */
 	tc_write(DP1_SRCCTRL,