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Tue, 14 May 2019 05:31:38 -0700 (PDT) Received: from abel.fritz.box ([2a02:908:1252:fb60:7d94:f6f9:368b:5a3b]) by smtp.gmail.com with ESMTPSA id n4sm6128704wmb.22.2019.05.14.05.31.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 May 2019 05:31:38 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: Marek.Olsak@amd.com, David1.Zhou@amd.com, Prike.Liang@amd.com, dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org Subject: [PATCH 10/11] drm/amd/display: use ttm_eu_reserve_buffers instead of amdgpu_bo_reserve v2 Date: Tue, 14 May 2019 14:31:26 +0200 Message-Id: <20190514123127.1650-10-christian.koenig@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190514123127.1650-1-christian.koenig@amd.com> References: <20190514123127.1650-1-christian.koenig@amd.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=GdOA44SxirHkAVChdVGJp77SKGhHA/5hptKvFRyO/X0=; b=HVjqNk5ezU/QU9z41bITraauzTh/MBEcPW/zxU8fr8YIDBFTMbsgN4B+DkKt5wvx/k MsIeB+buta7Nm10p8YdaRk6feOSG9ogrMag3EIhfmSQDsHUjnPMI3vSpmvfc0s7p+hU/ kR1FHvNMxDADEVA+2LauxydizEy9LkwbpDHEhDTaQGmsi4MBM2n9xUtD/w+CHdeprrWQ +nCN9Ktnlw6PjOEiQbhb8dvZKnEPZ6dtxWxDB8EGtXeFnu8jFxG18ZLkyYfwEx1rqWn1 22hg9OiIwppdpwbLRsqAOJfSLeArfJcaZAwTirYPRPDd3IpnYyJA+BKwDu4gnjGAKhHS yPUw== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Chunming Zhou add ticket for display bo, so that it can preempt busy bo. v2: fix stupid rebase error Change-Id: I9f031cdcc8267de00e819ae303baa0a52df8ebb9 Signed-off-by: Chunming Zhou Reviewed-by: Christian König --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 ++++++++++++++----- 1 file changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index d7f9d3998641..1c85ed772161 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -4176,6 +4176,9 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, struct amdgpu_device *adev; struct amdgpu_bo *rbo; struct dm_plane_state *dm_plane_state_new, *dm_plane_state_old; + struct list_head list; + struct ttm_validate_buffer tv; + struct ww_acquire_ctx ticket; uint64_t tiling_flags; uint32_t domain; int r; @@ -4192,9 +4195,17 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, obj = new_state->fb->obj[0]; rbo = gem_to_amdgpu_bo(obj); adev = amdgpu_ttm_adev(rbo->tbo.bdev); - r = amdgpu_bo_reserve(rbo, false); - if (unlikely(r != 0)) + INIT_LIST_HEAD(&list); + + tv.bo = &rbo->tbo; + tv.num_shared = 1; + list_add(&tv.head, &list); + + r = ttm_eu_reserve_buffers(&ticket, &list, false, NULL, true); + if (r) { + dev_err(adev->dev, "fail to reserve bo (%d)\n", r); return r; + } if (plane->type != DRM_PLANE_TYPE_CURSOR) domain = amdgpu_display_supported_domains(adev); @@ -4205,21 +4216,21 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane, if (unlikely(r != 0)) { if (r != -ERESTARTSYS) DRM_ERROR("Failed to pin framebuffer with error %d\n", r); - amdgpu_bo_unreserve(rbo); + ttm_eu_backoff_reservation(&ticket, &list); return r; } r = amdgpu_ttm_alloc_gart(&rbo->tbo); if (unlikely(r != 0)) { amdgpu_bo_unpin(rbo); - amdgpu_bo_unreserve(rbo); + ttm_eu_backoff_reservation(&ticket, &list); DRM_ERROR("%p bind failed\n", rbo); return r; } amdgpu_bo_get_tiling_flags(rbo, &tiling_flags); - amdgpu_bo_unreserve(rbo); + ttm_eu_backoff_reservation(&ticket, &list); afb->address = amdgpu_bo_gpu_offset(rbo);