diff mbox series

[2/2] drm/edid: Ignore "DFP 1.x" bit for EDID 1.2 and earlier

Message ID 20190529110204.2384-2-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/2] drm/edid: Clean up DRM_EDID_DIGITAL_* flags | expand

Commit Message

Ville Syrjala May 29, 2019, 11:02 a.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

From VESA EDID implementation guide v1.0:
"For EDID version 1 revision 2 or earlier data structures when offset 14h
 bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
 cannot be interpreted to mean anything."

And since EDID 1.4 redefines that bit let's consult it only for
EDID 1.3.

Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/drm_edid.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Alex Deucher May 29, 2019, 1:50 p.m. UTC | #1 
On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> From VESA EDID implementation guide v1.0:
> "For EDID version 1 revision 2 or earlier data structures when offset 14h
>  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
>  cannot be interpreted to mean anything."
>
> And since EDID 1.4 redefines that bit let's consult it only for
> EDID 1.3.
>
> Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Series is:
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/drm_edid.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index dd601ed6a30e..c3296a72fff9 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
>          * tells us to assume 8 bpc color depth if the EDID doesn't have
>          * extensions which tell otherwise.
>          */
> -       if ((info->bpc == 0) && (edid->revision < 4) &&
> -           (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
> +       if (info->bpc == 0 && edid->revision == 3 &&
> +           edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
>                 info->bpc = 8;
>                 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
>                           connector->name, info->bpc);
> --
> 2.21.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Mario Kleiner May 29, 2019, 4:50 p.m. UTC | #2 
On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
<ville.syrjala@linux.intel.com> wrote:
>
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> From VESA EDID implementation guide v1.0:
> "For EDID version 1 revision 2 or earlier data structures when offset 14h
>  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
>  cannot be interpreted to mean anything."
>
> And since EDID 1.4 redefines that bit let's consult it only for
> EDID 1.3.
>
> Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Yes. Series is:
Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>

-mario

On Wed, May 29, 2019 at 3:50 PM Alex Deucher <alexdeucher@gmail.com> wrote:
>
> On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > From VESA EDID implementation guide v1.0:
> > "For EDID version 1 revision 2 or earlier data structures when offset 14h
> >  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
> >  cannot be interpreted to mean anything."
> >
> > And since EDID 1.4 redefines that bit let's consult it only for
> > EDID 1.3.
> >
> > Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Series is:
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> > ---
> >  drivers/gpu/drm/drm_edid.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index dd601ed6a30e..c3296a72fff9 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
> >          * tells us to assume 8 bpc color depth if the EDID doesn't have
> >          * extensions which tell otherwise.
> >          */
> > -       if ((info->bpc == 0) && (edid->revision < 4) &&
> > -           (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
> > +       if (info->bpc == 0 && edid->revision == 3 &&
> > +           edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
> >                 info->bpc = 8;
> >                 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
> >                           connector->name, info->bpc);
> > --
> > 2.21.0
> >
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
Ville Syrjala June 6, 2019, 1:24 p.m. UTC | #3 
On Wed, May 29, 2019 at 06:50:40PM +0200, Mario Kleiner wrote:
> On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > From VESA EDID implementation guide v1.0:
> > "For EDID version 1 revision 2 or earlier data structures when offset 14h
> >  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
> >  cannot be interpreted to mean anything."
> >
> > And since EDID 1.4 redefines that bit let's consult it only for
> > EDID 1.3.
> >
> > Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Yes. Series is:
> Reviewed-by: Mario Kleiner <mario.kleiner.de@gmail.com>
> 
> -mario
> 
> On Wed, May 29, 2019 at 3:50 PM Alex Deucher <alexdeucher@gmail.com> wrote:
> >
> > On Wed, May 29, 2019 at 7:02 AM Ville Syrjala
> > <ville.syrjala@linux.intel.com> wrote:
> > >
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > From VESA EDID implementation guide v1.0:
> > > "For EDID version 1 revision 2 or earlier data structures when offset 14h
> > >  bit 7 is set to one, the value of bits 6-0 are undefined, and therefore
> > >  cannot be interpreted to mean anything."
> > >
> > > And since EDID 1.4 redefines that bit let's consult it only for
> > > EDID 1.3.
> > >
> > > Cc: Mario Kleiner <mario.kleiner.de@gmail.com>
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Series is:
> > Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Thanks. Series pushed to drm-misc-next.

> >
> > > ---
> > >  drivers/gpu/drm/drm_edid.c | 4 ++--
> > >  1 file changed, 2 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > > index dd601ed6a30e..c3296a72fff9 100644
> > > --- a/drivers/gpu/drm/drm_edid.c
> > > +++ b/drivers/gpu/drm/drm_edid.c
> > > @@ -4569,8 +4569,8 @@ u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
> > >          * tells us to assume 8 bpc color depth if the EDID doesn't have
> > >          * extensions which tell otherwise.
> > >          */
> > > -       if ((info->bpc == 0) && (edid->revision < 4) &&
> > > -           (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
> > > +       if (info->bpc == 0 && edid->revision == 3 &&
> > > +           edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
> > >                 info->bpc = 8;
> > >                 DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
> > >                           connector->name, info->bpc);
> > > --
> > > 2.21.0
> > >
> > > _______________________________________________
> > > dri-devel mailing list
> > > dri-devel@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/dri-devel
> > _______________________________________________
> > dri-devel mailing list
> > dri-devel@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
diff mbox series

Patch

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index dd601ed6a30e..c3296a72fff9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4569,8 +4569,8 @@  u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edi
 	 * tells us to assume 8 bpc color depth if the EDID doesn't have
 	 * extensions which tell otherwise.
 	 */
-	if ((info->bpc == 0) && (edid->revision < 4) &&
-	    (edid->input & DRM_EDID_DIGITAL_DFP_1_X)) {
+	if (info->bpc == 0 && edid->revision == 3 &&
+	    edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
 		info->bpc = 8;
 		DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
 			  connector->name, info->bpc);