diff mbox series

drm/amd/display: Use msleep instead of udelay for 8ms wait

Message ID 20190625140046.31682-1-harry.wentland@amd.com (mailing list archive)
State New, archived
Headers show
Series drm/amd/display: Use msleep instead of udelay for 8ms wait | expand

Commit Message

Harry Wentland June 25, 2019, 2 p.m. UTC
arm32's udelay only allows values up to 2000 microseconds. msleep
does the trick for us here as there is no problem if this isn't
microsecond accurate and takes a tad longer.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
---
 drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Alex Deucher June 25, 2019, 2:03 p.m. UTC | #1
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Lucas Stach June 25, 2019, 2:12 p.m. UTC | #2
Hi Harry,

Am Dienstag, den 25.06.2019, 10:00 -0400 schrieb Harry Wentland:
> arm32's udelay only allows values up to 2000 microseconds. msleep
> does the trick for us here as there is no problem if this isn't
> microsecond accurate and takes a tad longer.

A "tad" longer in this case means likely double the intended wait.
Please see "SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms)" in
Documentation/timers/timers-howto.txt.

The sleep here should use usleep_range. In general the DC code seems to
use quite a lot of the udelay busy waits. I doubt that many of those
occurrences are in atomic context, so could easily use a sleeping wait.

Digging further this seems to apply across amdgpu, not only DC.

Regards,
Lucas

> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
> ---
>  drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> index 4c31930f1cdf..f5d02f89b3f9 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
> @@ -548,7 +548,7 @@ static void
> read_edp_current_link_settings_on_detect(struct dc_link *link)
>  			break;
>  		}
>  
> -		udelay(8000);
> +		msleep(8);
>  	}
>  
>  	ASSERT(status == DC_OK);
Christian König June 25, 2019, 2:26 p.m. UTC | #3
Am 25.06.19 um 16:12 schrieb Lucas Stach:
> Hi Harry,
>
> Am Dienstag, den 25.06.2019, 10:00 -0400 schrieb Harry Wentland:
>> arm32's udelay only allows values up to 2000 microseconds. msleep
>> does the trick for us here as there is no problem if this isn't
>> microsecond accurate and takes a tad longer.
> A "tad" longer in this case means likely double the intended wait.
> Please see "SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms)" in
> Documentation/timers/timers-howto.txt.

Oh, thanks so much for the link! I was searching desperately for this 
the last time this came up and couldn't find it.

Clearly going to remember now where to find that.

Thanks,
Christian.

>
> The sleep here should use usleep_range. In general the DC code seems to
> use quite a lot of the udelay busy waits. I doubt that many of those
> occurrences are in atomic context, so could easily use a sleeping wait.
>
> Digging further this seems to apply across amdgpu, not only DC.
>
> Regards,
> Lucas
>
>> Signed-off-by: Harry Wentland <harry.wentland@amd.com>
>> ---
>>   drivers/gpu/drm/amd/display/dc/core/dc_link.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> index 4c31930f1cdf..f5d02f89b3f9 100644
>> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
>> @@ -548,7 +548,7 @@ static void
>> read_edp_current_link_settings_on_detect(struct dc_link *link)
>>   			break;
>>   		}
>>   
>> -		udelay(8000);
>> +		msleep(8);
>>   	}
>>   
>>   	ASSERT(status == DC_OK);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link.c b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
index 4c31930f1cdf..f5d02f89b3f9 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link.c
@@ -548,7 +548,7 @@  static void read_edp_current_link_settings_on_detect(struct dc_link *link)
 			break;
 		}
 
-		udelay(8000);
+		msleep(8);
 	}
 
 	ASSERT(status == DC_OK);