From patchwork Tue Jul 23 20:09:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Sam Ravnborg X-Patchwork-Id: 11055259 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 46B596C5 for ; Tue, 23 Jul 2019 20:10:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 371692873D for ; Tue, 23 Jul 2019 20:10:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2B06B2873E; Tue, 23 Jul 2019 20:10:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id F35DD28749 for ; Tue, 23 Jul 2019 20:10:29 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 65E046E3B0; Tue, 23 Jul 2019 20:10:29 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x142.google.com (mail-lf1-x142.google.com [IPv6:2a00:1450:4864:20::142]) by gabe.freedesktop.org (Postfix) with ESMTPS id 5A7B76E3B0; Tue, 23 Jul 2019 20:10:28 +0000 (UTC) Received: by mail-lf1-x142.google.com with SMTP id r15so13252602lfm.11; Tue, 23 Jul 2019 13:10:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=pSlfFWrE8xRexBaFOY/5C7GNNBw4XqknPH/j/io31tg=; b=LrTUAubkIZLvBvs+cjLBv4CNx8rbxHBeAdORPl8vxbPXykV7Wt7jSaJQ10GhmDpd5x +cmoJvhDSnZd9Y+cbEbAVKZjLEgy75p8Imu+3gaxweNRuqYZj5PLUDlttTwFrPSk39XQ smNYdsNyoRHHi52obSHO+KM0IQ4Jt1idW3fMQn8YMtdIgZWsPPvGqLMQfUSem6LZn926 CQFcGE1g9qSXCKDzCBHyXC2mR+1EWRIMPfL/y1NGbem7c+7tYTFVMxpT5Vn2S8wJBRvk TjPds5eXnMDpRBiXEdwmV2uJRpRNi4/wQ6EPuaUuZbtlhg3jFVCtkEBq+9iDuhmIfYwu Ui7w== X-Gm-Message-State: APjAAAXkj5MFhpnB79yaLOJ1VbPtSldMpDf7lLwXawQZ0t8ehB/JWg9e SpjFA7IV6/thu3mVjrIymGDpdyapZnE= X-Google-Smtp-Source: APXvYqwp4LhDhdTsCwdiRqxW/Y2P8jMYzhVFzC/R5iZjMLMH9hvLT5Lxm7/LTjNHLl2bjmP6+f3hpQ== X-Received: by 2002:a19:5218:: with SMTP id m24mr19083625lfb.164.1563912626487; Tue, 23 Jul 2019 13:10:26 -0700 (PDT) Received: from saturn.lan (18.158-248-194.customer.lyse.net. [158.248.194.18]) by smtp.gmail.com with ESMTPSA id p21sm6708006lfc.41.2019.07.23.13.10.24 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 23 Jul 2019 13:10:25 -0700 (PDT) From: Sam Ravnborg To: dri-devel@lists.freedesktop.org, openchrome-devel@lists.freedesktop.org Subject: [PATCH v4 1/4] drm/via: drop use of DRM(READ|WRITE) macros Date: Tue, 23 Jul 2019 22:09:41 +0200 Message-Id: <20190723200944.17285-2-sam@ravnborg.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190723200944.17285-1-sam@ravnborg.org> References: <20190723200944.17285-1-sam@ravnborg.org> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=pSlfFWrE8xRexBaFOY/5C7GNNBw4XqknPH/j/io31tg=; b=vPOcdVbZZEj+ACae0HOS+AQsyygVUWrrQnBI9y3Dl0/L7EXj0Qw5kL8Mcv62/sz7n0 W/hnh5Z2481j6juegYJJcgi2g0PxIBv5sbshKNz6rMsSSHiha8bRu4qZ1O9PlXkOixtf fzO6nxW7lM64sSJVIAQ50+zptA7PMfyPjJuKQu0qQfkDq478/J1YwwADIOvUb0aEA8DU gM0R9yuqhW0rmQscrFdvL6tByovfDUhAX+bBaY3e2oBZPag4AD/XeORDsr7Qu7aqqRVy 2TtQZF7cfbz+TkhApSBnyuy5aB+JIPv7M5pBeeoM3jyPcvyFNstUSjcrgl//5EDKqEnB Gv+g== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Hellstrom , Sam Ravnborg , "Gustavo A. R. Silva" , David Airlie , Daniel Vetter , =?utf-8?q?Michel_D=C3=A4nzer?= , Kevin Brace , Mike Marshall , Ira Weiny , Emil Velikov Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP The DRM_READ, DRM_WRITE macros comes from the deprecated drm_os_linux.h header file. Remove their use to remove this dependency. Replace the use of the macros with static inline variants. v4: - Use a more standard via_write8_mask() function (Emil) v3: - Use static inline functions, rather than macros (Emil) - Use dedicated mask variants for byte access (Emil) Signed-off-by: Sam Ravnborg Cc: Kevin Brace Cc: Thomas Hellstrom Cc: "Gustavo A. R. Silva" Cc: Mike Marshall Cc: Ira Weiny Cc: Daniel Vetter Cc: Emil Velikov Cc: Michel Dänzer --- drivers/gpu/drm/via/via_dma.c | 34 +++++++++++----------- drivers/gpu/drm/via/via_dmablit.c | 24 ++++++++-------- drivers/gpu/drm/via/via_drv.h | 32 +++++++++++++++++---- drivers/gpu/drm/via/via_irq.c | 46 +++++++++++++++--------------- drivers/gpu/drm/via/via_verifier.c | 12 ++++---- 5 files changed, 84 insertions(+), 64 deletions(-) diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c index d17d8f245c1a..344a12b63967 100644 --- a/drivers/gpu/drm/via/via_dma.c +++ b/drivers/gpu/drm/via/via_dma.c @@ -430,14 +430,14 @@ static int via_hook_segment(drm_via_private_t *dev_priv, diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; count = 10000000; while (diff == 0 && count--) { - paused = (VIA_READ(0x41c) & 0x80000000); + paused = (via_read(dev_priv, 0x41c) & 0x80000000); if (paused) break; reader = *(dev_priv->hw_addr_ptr); diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; } - paused = VIA_READ(0x41c) & 0x80000000; + paused = via_read(dev_priv, 0x41c) & 0x80000000; if (paused && !no_pci_fire) { reader = *(dev_priv->hw_addr_ptr); @@ -454,10 +454,10 @@ static int via_hook_segment(drm_via_private_t *dev_priv, * doesn't make a difference. */ - VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); - VIA_READ(VIA_REG_TRANSPACE); + via_write(dev_priv, VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); + via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_hi); + via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_lo); + via_read(dev_priv, VIA_REG_TRANSPACE); } } return paused; @@ -467,10 +467,10 @@ static int via_wait_idle(drm_via_private_t *dev_priv) { int count = 10000000; - while (!(VIA_READ(VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && --count) + while (!(via_read(dev_priv, VIA_REG_STATUS) & VIA_VR_QUEUE_BUSY) && --count) ; - while (count && (VIA_READ(VIA_REG_STATUS) & + while (count && (via_read(dev_priv, VIA_REG_STATUS) & (VIA_CMD_RGTR_BUSY | VIA_2D_ENG_BUSY | VIA_3D_ENG_BUSY))) --count; @@ -536,21 +536,21 @@ static void via_cmdbuf_start(drm_via_private_t *dev_priv) via_flush_write_combine(); (void) *(volatile uint32_t *)dev_priv->last_pause_ptr; - VIA_WRITE(VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); - VIA_WRITE(VIA_REG_TRANSPACE, command); - VIA_WRITE(VIA_REG_TRANSPACE, start_addr_lo); - VIA_WRITE(VIA_REG_TRANSPACE, end_addr_lo); + via_write(dev_priv, VIA_REG_TRANSET, (HC_ParaType_PreCR << 16)); + via_write(dev_priv, VIA_REG_TRANSPACE, command); + via_write(dev_priv, VIA_REG_TRANSPACE, start_addr_lo); + via_write(dev_priv, VIA_REG_TRANSPACE, end_addr_lo); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_hi); - VIA_WRITE(VIA_REG_TRANSPACE, pause_addr_lo); + via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_hi); + via_write(dev_priv, VIA_REG_TRANSPACE, pause_addr_lo); wmb(); - VIA_WRITE(VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); - VIA_READ(VIA_REG_TRANSPACE); + via_write(dev_priv, VIA_REG_TRANSPACE, command | HC_HAGPCMNT_MASK); + via_read(dev_priv, VIA_REG_TRANSPACE); dev_priv->dma_diff = 0; count = 10000000; - while (!(VIA_READ(0x41c) & 0x80000000) && count--); + while (!(via_read(dev_priv, 0x41c) & 0x80000000) && count--); reader = *(dev_priv->hw_addr_ptr); ptr = ((volatile char *)dev_priv->last_pause_ptr - dev_priv->dma_ptr) + diff --git a/drivers/gpu/drm/via/via_dmablit.c b/drivers/gpu/drm/via/via_dmablit.c index 062067438f1d..e1557dd67083 100644 --- a/drivers/gpu/drm/via/via_dmablit.c +++ b/drivers/gpu/drm/via/via_dmablit.c @@ -214,16 +214,16 @@ via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine) { drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - VIA_WRITE(VIA_PCI_DMA_MAR0 + engine*0x10, 0); - VIA_WRITE(VIA_PCI_DMA_DAR0 + engine*0x10, 0); - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD | + via_write(dev_priv, VIA_PCI_DMA_MAR0 + engine*0x10, 0); + via_write(dev_priv, VIA_PCI_DMA_DAR0 + engine*0x10, 0); + via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD | VIA_DMA_CSR_DE); - VIA_WRITE(VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); - VIA_WRITE(VIA_PCI_DMA_BCR0 + engine*0x10, 0); - VIA_WRITE(VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); + via_write(dev_priv, VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE); + via_write(dev_priv, VIA_PCI_DMA_BCR0 + engine*0x10, 0); + via_write(dev_priv, VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start); wmb(); - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); - VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04); + via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS); + via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04); } /* @@ -291,7 +291,7 @@ via_abort_dmablit(struct drm_device *dev, int engine) { drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA); + via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA); } static void @@ -299,7 +299,7 @@ via_dmablit_engine_off(struct drm_device *dev, int engine) { drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD); + via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD); } @@ -330,7 +330,7 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq) spin_lock_irqsave(&blitq->blit_lock, irqsave); done_transfer = blitq->is_active && - ((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); + ((status = via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE)); cur = blitq->cur; @@ -349,7 +349,7 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq) * Clear transfer done flag. */ - VIA_WRITE(VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD); + via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD); blitq->is_active = 0; blitq->aborting = 0; diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h index 6d1ae834484c..368185b80184 100644 --- a/drivers/gpu/drm/via/via_drv.h +++ b/drivers/gpu/drm/via/via_drv.h @@ -113,12 +113,32 @@ enum via_family { }; /* VIA MMIO register access */ -#define VIA_BASE ((dev_priv->mmio)) - -#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) -#define VIA_WRITE(reg, val) DRM_WRITE32(VIA_BASE, reg, val) -#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) -#define VIA_WRITE8(reg, val) DRM_WRITE8(VIA_BASE, reg, val) +static inline u32 via_read(struct drm_via_private *dev_priv, u32 reg) +{ + return readl((void __iomem *)(dev_priv->mmio->handle + reg)); +} + +static inline void via_write(struct drm_via_private *dev_priv, u32 reg, + u32 val) +{ + writel(val, (void __iomem *)(dev_priv->mmio->handle + reg)); +} + +static inline void via_write8(struct drm_via_private *dev_priv, u32 reg, + u32 val) +{ + writeb(val, (void __iomem *)(dev_priv->mmio->handle + reg)); +} + +static inline void via_write8_mask(struct drm_via_private *dev_priv, + u32 reg, u32 mask, u32 val) +{ + u32 tmp; + + tmp = readb((void __iomem *)(dev_priv->mmio->handle + reg)); + tmp = (tmp & ~mask) | (val & mask); + writeb(tmp, (void __iomem *)(dev_priv->mmio->handle + reg)); +} extern const struct drm_ioctl_desc via_ioctls[]; extern int via_max_ioctl; diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c index c96830ccc0ec..08c87127f143 100644 --- a/drivers/gpu/drm/via/via_irq.c +++ b/drivers/gpu/drm/via/via_irq.c @@ -108,7 +108,7 @@ irqreturn_t via_driver_irq_handler(int irq, void *arg) drm_via_irq_t *cur_irq = dev_priv->via_irqs; int i; - status = VIA_READ(VIA_REG_INTERRUPT); + status = via_read(dev_priv, VIA_REG_INTERRUPT); if (status & VIA_IRQ_VBLANK_PENDING) { atomic_inc(&dev_priv->vbl_received); if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) { @@ -143,7 +143,7 @@ irqreturn_t via_driver_irq_handler(int irq, void *arg) } /* Acknowledge interrupts */ - VIA_WRITE(VIA_REG_INTERRUPT, status); + via_write(dev_priv, VIA_REG_INTERRUPT, status); if (handled) @@ -158,8 +158,8 @@ static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t *dev_priv) if (dev_priv) { /* Acknowledge interrupts */ - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | + status = via_read(dev_priv, VIA_REG_INTERRUPT); + via_write(dev_priv, VIA_REG_INTERRUPT, status | dev_priv->irq_pending_mask); } } @@ -174,11 +174,11 @@ int via_enable_vblank(struct drm_device *dev, unsigned int pipe) return -EINVAL; } - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_VBLANK_ENABLE); + status = via_read(dev_priv, VIA_REG_INTERRUPT); + via_write(dev_priv, VIA_REG_INTERRUPT, status | VIA_IRQ_VBLANK_ENABLE); - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); + via_write8(dev_priv, 0x83d4, 0x11); + via_write8_mask(dev_priv, 0x83d5, 0x30, 0x30); return 0; } @@ -188,11 +188,11 @@ void via_disable_vblank(struct drm_device *dev, unsigned int pipe) drm_via_private_t *dev_priv = dev->dev_private; u32 status; - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBLANK_ENABLE); + status = via_read(dev_priv, VIA_REG_INTERRUPT); + via_write(dev_priv, VIA_REG_INTERRUPT, status & ~VIA_IRQ_VBLANK_ENABLE); - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); + via_write8(dev_priv, 0x83d4, 0x11); + via_write8_mask(dev_priv, 0x83d5, 0x30, 0); if (pipe != 0) DRM_ERROR("%s: bad crtc %u\n", __func__, pipe); @@ -234,7 +234,7 @@ via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence if (masks[real_irq][2] && !force_sequence) { DRM_WAIT_ON(ret, cur_irq->irq_queue, 3 * HZ, - ((VIA_READ(masks[irq][2]) & masks[irq][3]) == + ((via_read(dev_priv, masks[irq][2]) & masks[irq][3]) == masks[irq][4])); cur_irq_sequence = atomic_read(&cur_irq->irq_received); } else { @@ -292,8 +292,8 @@ void via_driver_irq_preinstall(struct drm_device *dev) dev_priv->last_vblank_valid = 0; /* Clear VSync interrupt regs */ - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & + status = via_read(dev_priv, VIA_REG_INTERRUPT); + via_write(dev_priv, VIA_REG_INTERRUPT, status & ~(dev_priv->irq_enable_mask)); /* Clear bits if they're already high */ @@ -310,13 +310,13 @@ int via_driver_irq_postinstall(struct drm_device *dev) if (!dev_priv) return -EINVAL; - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL + status = via_read(dev_priv, VIA_REG_INTERRUPT); + via_write(dev_priv, VIA_REG_INTERRUPT, status | VIA_IRQ_GLOBAL | dev_priv->irq_enable_mask); /* Some magic, oh for some data sheets ! */ - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) | 0x30); + via_write8(dev_priv, 0x83d4, 0x11); + via_write8_mask(dev_priv, 0x83d5, 0x30, 0x30); return 0; } @@ -331,11 +331,11 @@ void via_driver_irq_uninstall(struct drm_device *dev) /* Some more magic, oh for some data sheets ! */ - VIA_WRITE8(0x83d4, 0x11); - VIA_WRITE8(0x83d5, VIA_READ8(0x83d5) & ~0x30); + via_write8(dev_priv, 0x83d4, 0x11); + via_write8_mask(dev_priv, 0x83d5, 0x30, 0); - status = VIA_READ(VIA_REG_INTERRUPT); - VIA_WRITE(VIA_REG_INTERRUPT, status & + status = via_read(dev_priv, VIA_REG_INTERRUPT); + via_write(dev_priv, VIA_REG_INTERRUPT, status & ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); } } diff --git a/drivers/gpu/drm/via/via_verifier.c b/drivers/gpu/drm/via/via_verifier.c index fb2609434df7..002c883b0d4b 100644 --- a/drivers/gpu/drm/via/via_verifier.c +++ b/drivers/gpu/drm/via/via_verifier.c @@ -725,14 +725,14 @@ via_parse_header2(drm_via_private_t *dev_priv, uint32_t const **buffer, next_fire = dev_priv->fire_offsets[*fire_count]; buf++; cmd = (*buf & 0xFFFF0000) >> 16; - VIA_WRITE(HC_REG_TRANS_SET + HC_REG_BASE, *buf++); + via_write(dev_priv, HC_REG_TRANS_SET + HC_REG_BASE, *buf++); switch (cmd) { case HC_ParaType_CmdVdata: while ((buf < buf_end) && (*fire_count < dev_priv->num_fire_offsets) && (*buf & HC_ACMD_MASK) == HC_ACMD_HCmdB) { while (buf <= next_fire) { - VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + + via_write(dev_priv, HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++); burst += 4; } @@ -753,7 +753,7 @@ via_parse_header2(drm_via_private_t *dev_priv, uint32_t const **buffer, (*buf & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) break; - VIA_WRITE(HC_REG_TRANS_SPACE + HC_REG_BASE + + via_write(dev_priv, HC_REG_TRANS_SPACE + HC_REG_BASE + (burst & 63), *buf++); burst += 4; } @@ -843,7 +843,7 @@ via_parse_header1(drm_via_private_t *dev_priv, uint32_t const **buffer, cmd = *buf; if ((cmd & HALCYON_HEADER1MASK) != HALCYON_HEADER1) break; - VIA_WRITE((cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); + via_write(dev_priv, (cmd & ~HALCYON_HEADER1MASK) << 2, *++buf); buf++; } *buffer = buf; @@ -894,7 +894,7 @@ via_parse_vheader5(drm_via_private_t *dev_priv, uint32_t const **buffer, i = count = *buf; buf += 3; while (i--) - VIA_WRITE(addr, *buf++); + via_write(dev_priv, addr, *buf++); if (count & 3) buf += 4 - (count & 3); *buffer = buf; @@ -950,7 +950,7 @@ via_parse_vheader6(drm_via_private_t *dev_priv, uint32_t const **buffer, buf += 3; while (i--) { addr = *buf++; - VIA_WRITE(addr, *buf++); + via_write(dev_priv, addr, *buf++); } count <<= 1; if (count & 3)