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Tue, 6 Aug 2019 17:45:55 +0000 Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) Received: from SATLEXCHOV01.amd.com (165.204.84.17) by BY2NAM03FT014.mail.protection.outlook.com (10.152.84.239) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2136.14 via Frontend Transport; Tue, 6 Aug 2019 17:45:54 +0000 Received: from hwentlanhp.amd.com (10.180.168.240) by SATLEXCHOV01.amd.com (10.181.40.71) with Microsoft SMTP Server id 14.3.389.1; Tue, 6 Aug 2019 12:45:53 -0500 From: Harry Wentland To: Subject: [PATCH] drm/amd/display: Add number of slices per line to DSC parameter validation Date: Tue, 6 Aug 2019 13:45:49 -0400 Message-ID: <20190806174549.7856-1-harry.wentland@amd.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: References: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:165.204.84.17; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(4636009)(136003)(346002)(39860400002)(396003)(376002)(2980300002)(428003)(199004)(189003)(2906002)(76176011)(44832011)(68736007)(70206006)(50226002)(8936002)(70586007)(8676002)(316002)(1076003)(81166006)(81156014)(14444005)(2870700001)(53416004)(53936002)(51416003)(476003)(36756003)(126002)(47776003)(426003)(7696005)(6916009)(486006)(2616005)(11346002)(336012)(4326008)(86362001)(356004)(478600001)(54906003)(48376002)(305945005)(6666004)(2351001)(5660300002)(50466002)(26005)(186003)(446003); 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Ip=[165.204.84.17]; Helo=[SATLEXCHOV01.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB1530 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amdcloud.onmicrosoft.com; s=selector1-amdcloud-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=TUKVk2ZE8nwPZ1LhyQ07nkU/pVIiQ7q6jRq+pAUmKcM=; b=fijginM+BsMt7HvPBaaPQPYUHKSDbfLcH2eIWMmzr8hFV7nYIi/1Bv+bZ4vUJno/E3XVp2MXjSL45eD684K+4QQURsI+nqldAPump7hKw0fRM+sOLobHYA5NGijZYjDGClGj2vSOicycb2I4j9qQETR4XJ61PVAyYbZKXcciN98= X-Mailman-Original-Authentication-Results: spf=none (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; lists.freedesktop.org; dkim=none (message not signed) header.d=none;lists.freedesktop.org; dmarc=permerror action=none header.from=amd.com; X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sunpeng.li@amd.com, linux-kernel@vger.kernel.org, amd-gfx@lists.freedesktop.org, nikola.cornij@amd.com, airlied@linux.ie, Dmytro.Laktyushkin@amd.com, dri-devel@lists.freedesktop.org, alexander.deucher@amd.com, colin.king@canonical.com, christian.koenig@amd.com Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" X-Virus-Scanned: ClamAV using ClamSMTP From: Nikola Cornij [why] Number of slices per line was mistakenly left out Cc: Hariprasad Kelam Signed-off-by: Nikola Cornij Signed-off-by: Harry Wentland Reviewed-by: Harry Wentland Acked-by: Alex Deucher --- Thanks, Hariprasad, for your patch. The second condition should actually check for num_slices_h. Harry drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c index e870caa8d4fa..adb69c038efb 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c @@ -302,7 +302,7 @@ static bool dsc_prepare_config(struct display_stream_compressor *dsc, const stru dsc_cfg->dc_dsc_cfg.linebuf_depth == 0))); ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.9375 - if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_v || + if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) || !dsc_cfg->pic_width || !dsc_cfg->pic_height || !((dsc_cfg->dc_dsc_cfg.version_minor == 1 && // v1.1 line buffer depth range: