Message ID | 20190819155038.1771-8-David.Francis@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Display Stream Compression (DSC) for AMD Navi | expand |
On 8/19/19 11:50 AM, David Francis wrote: > For DSC MST, sometimes monitors would break out > in full-screen static. The issue traced back to the > PPS generation code, where these variables were being used > uninitialized and were picking up garbage. > > memset to 0 to avoid this > > Signed-off-by: David Francis <David.Francis@amd.com> Patches 1-5 and 7 are: Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> > --- > drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 3 +++ > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 +++ > 2 files changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c > index 35c5467e60e8..619ac48edd05 100644 > --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c > +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c > @@ -491,6 +491,9 @@ bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable) > struct dsc_config dsc_cfg; > uint8_t dsc_packed_pps[128]; > > + memset(&dsc_cfg, 0, sizeof(dsc_cfg)); > + memset(dsc_packed_pps, 0, 128); > + > /* Enable DSC hw block */ > dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right; > dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > index 379c9e4ac63b..16debe6d89f2 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > @@ -207,6 +207,9 @@ static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const str > struct dsc_reg_values dsc_reg_vals; > struct dsc_optc_config dsc_optc_cfg; > > + memset(&dsc_reg_vals, 0, sizeof(dsc_reg_vals)); > + memset(&dsc_optc_cfg, 0, sizeof(dsc_optc_cfg)); > + > DC_LOG_DSC("Getting packed DSC PPS for DSC Config:"); > dsc_config_log(dsc, dsc_cfg); > DC_LOG_DSC("DSC Picture Parameter Set (PPS):"); >
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c index 35c5467e60e8..619ac48edd05 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c @@ -491,6 +491,9 @@ bool dp_set_dsc_pps_sdp(struct pipe_ctx *pipe_ctx, bool enable) struct dsc_config dsc_cfg; uint8_t dsc_packed_pps[128]; + memset(&dsc_cfg, 0, sizeof(dsc_cfg)); + memset(dsc_packed_pps, 0, 128); + /* Enable DSC hw block */ dsc_cfg.pic_width = stream->timing.h_addressable + stream->timing.h_border_left + stream->timing.h_border_right; dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v_border_bottom; diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c index 379c9e4ac63b..16debe6d89f2 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c @@ -207,6 +207,9 @@ static bool dsc2_get_packed_pps(struct display_stream_compressor *dsc, const str struct dsc_reg_values dsc_reg_vals; struct dsc_optc_config dsc_optc_cfg; + memset(&dsc_reg_vals, 0, sizeof(dsc_reg_vals)); + memset(&dsc_optc_cfg, 0, sizeof(dsc_optc_cfg)); + DC_LOG_DSC("Getting packed DSC PPS for DSC Config:"); dsc_config_log(dsc, dsc_cfg); DC_LOG_DSC("DSC Picture Parameter Set (PPS):");
For DSC MST, sometimes monitors would break out in full-screen static. The issue traced back to the PPS generation code, where these variables were being used uninitialized and were picking up garbage. memset to 0 to avoid this Signed-off-by: David Francis <David.Francis@amd.com> --- drivers/gpu/drm/amd/display/dc/core/dc_link_hwss.c | 3 +++ drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 3 +++ 2 files changed, 6 insertions(+)