Message ID | 20190820191203.25807-9-David.Francis@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Display Stream Compression (DSC) for AMD Navi | expand |
Reviewed-by: Lyude Paul <lyude@redhat.com> On Tue, 2019-08-20 at 15:11 -0400, David Francis wrote: > As of DP1.4, ENUM_PATH_RESOURCES returns a bit indicating > if FEC can be supported up to that point in the MST network. > > The bit is the first byte of the ENUM_PATH_RESOURCES ack reply, > bottom-most bit (refer to section 2.11.9.4 of DP standard, > v1.4) > > That value is needed for FEC and DSC support > > Store it on drm_dp_mst_port > > Signed-off-by: David Francis <David.Francis@amd.com> > --- > drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++ > include/drm/drm_dp_mst_helper.h | 3 +++ > 2 files changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c > b/drivers/gpu/drm/drm_dp_mst_topology.c > index d789b7af7dbf..b40d975aec76 100644 > --- a/drivers/gpu/drm/drm_dp_mst_topology.c > +++ b/drivers/gpu/drm/drm_dp_mst_topology.c > @@ -552,6 +552,7 @@ static bool > drm_dp_sideband_parse_enum_path_resources_ack(struct drm_dp_sideband > { > int idx = 1; > repmsg->u.path_resources.port_number = (raw->msg[idx] >> 4) & 0xf; > + repmsg->u.path_resources.fec_capable = raw->msg[idx] & 0x1; > idx++; > if (idx > raw->curlen) > goto fail_len; > @@ -2180,6 +2181,7 @@ static int drm_dp_send_enum_path_resources(struct > drm_dp_mst_topology_mgr *mgr, > DRM_DEBUG_KMS("enum path resources %d: %d %d\n", > txmsg->reply.u.path_resources.port_number, txmsg- > >reply.u.path_resources.full_payload_bw_number, > txmsg- > >reply.u.path_resources.avail_payload_bw_number); > port->available_pbn = txmsg- > >reply.u.path_resources.avail_payload_bw_number; > + port->fec_capable = txmsg- > >reply.u.path_resources.fec_capable; > } > } > > diff --git a/include/drm/drm_dp_mst_helper.h > b/include/drm/drm_dp_mst_helper.h > index ddb518f2157a..fa973773a4a7 100644 > --- a/include/drm/drm_dp_mst_helper.h > +++ b/include/drm/drm_dp_mst_helper.h > @@ -108,6 +108,8 @@ struct drm_dp_mst_port { > * audio-capable. > */ > bool has_audio; > + > + bool fec_capable; > }; > > /** > @@ -312,6 +314,7 @@ struct drm_dp_port_number_req { > > struct drm_dp_enum_path_resources_ack_reply { > u8 port_number; > + bool fec_capable; > u16 full_payload_bw_number; > u16 avail_payload_bw_number; > };
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c index d789b7af7dbf..b40d975aec76 100644 --- a/drivers/gpu/drm/drm_dp_mst_topology.c +++ b/drivers/gpu/drm/drm_dp_mst_topology.c @@ -552,6 +552,7 @@ static bool drm_dp_sideband_parse_enum_path_resources_ack(struct drm_dp_sideband { int idx = 1; repmsg->u.path_resources.port_number = (raw->msg[idx] >> 4) & 0xf; + repmsg->u.path_resources.fec_capable = raw->msg[idx] & 0x1; idx++; if (idx > raw->curlen) goto fail_len; @@ -2180,6 +2181,7 @@ static int drm_dp_send_enum_path_resources(struct drm_dp_mst_topology_mgr *mgr, DRM_DEBUG_KMS("enum path resources %d: %d %d\n", txmsg->reply.u.path_resources.port_number, txmsg->reply.u.path_resources.full_payload_bw_number, txmsg->reply.u.path_resources.avail_payload_bw_number); port->available_pbn = txmsg->reply.u.path_resources.avail_payload_bw_number; + port->fec_capable = txmsg->reply.u.path_resources.fec_capable; } } diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h index ddb518f2157a..fa973773a4a7 100644 --- a/include/drm/drm_dp_mst_helper.h +++ b/include/drm/drm_dp_mst_helper.h @@ -108,6 +108,8 @@ struct drm_dp_mst_port { * audio-capable. */ bool has_audio; + + bool fec_capable; }; /** @@ -312,6 +314,7 @@ struct drm_dp_port_number_req { struct drm_dp_enum_path_resources_ack_reply { u8 port_number; + bool fec_capable; u16 full_payload_bw_number; u16 avail_payload_bw_number; };
As of DP1.4, ENUM_PATH_RESOURCES returns a bit indicating if FEC can be supported up to that point in the MST network. The bit is the first byte of the ENUM_PATH_RESOURCES ack reply, bottom-most bit (refer to section 2.11.9.4 of DP standard, v1.4) That value is needed for FEC and DSC support Store it on drm_dp_mst_port Signed-off-by: David Francis <David.Francis@amd.com> --- drivers/gpu/drm/drm_dp_mst_topology.c | 2 ++ include/drm/drm_dp_mst_helper.h | 3 +++ 2 files changed, 5 insertions(+)