From patchwork Tue Aug 20 23:06:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: John Stultz X-Patchwork-Id: 11104825 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF7671395 for ; Tue, 20 Aug 2019 23:06:59 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 97DDA2332B for ; Tue, 20 Aug 2019 23:06:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 97DDA2332B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id D92C86E8BD; Tue, 20 Aug 2019 23:06:51 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-pl1-x641.google.com (mail-pl1-x641.google.com [IPv6:2607:f8b0:4864:20::641]) by gabe.freedesktop.org (Postfix) with ESMTPS id 41EF66E8AB for ; Tue, 20 Aug 2019 23:06:32 +0000 (UTC) Received: by mail-pl1-x641.google.com with SMTP id c2so205305plz.13 for ; Tue, 20 Aug 2019 16:06:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=q1UYVKf1UgYkHQbbceABIVFSdc5VY9rhqkw1qWPFE+g=; b=MBxjmB8jaUWbFlV4M0o39mk26JVUkA9YwVR4lYfE9q7balkpcWc/b5Sr/ER4gIwu3N aQu/QOHFmjVPidxMsdKAwFSYm+EO6Jgg3EtT/UHBg80/MFdiGt4fBfPL/kPc+WiRfXj9 MpEwCtiEt0+musZZK4g2YAk3MGp2aysAPpaCpKBZOKrRvBpLmxSdbQNV8ojAFhOuwWmw 8NUdLa7moCUCX7BDuovfT8jSJUqiFC8hiFU/uJm82s1Igf9tw4chKzW7XP1LpGeohQMt mUsv8kW/335kXzh2WcVoauBTQZZrH4845pG+xMX22v3GDjqZZ6vphp8q9CSGrs2OzaF7 n2Ww== X-Gm-Message-State: APjAAAVRxXgbipNuYaZRrCp8OadB4BnKKU8WOahtKwWKKTP4I5eZcjLu qUBtt8j41jF+zkx02SdFShUlJQ== X-Google-Smtp-Source: APXvYqw5D4BZDetSBcN2Jnla7obS49bgLF/nwN7GXXGmMfCHVZaEj82kGnEeoSYhj3aNYpuZGpkXRg== X-Received: by 2002:a17:902:9895:: with SMTP id s21mr16299078plp.255.1566342391778; Tue, 20 Aug 2019 16:06:31 -0700 (PDT) Received: from localhost.localdomain ([2601:1c2:680:1319:692:26ff:feda:3a81]) by smtp.gmail.com with ESMTPSA id q4sm27564747pff.183.2019.08.20.16.06.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Aug 2019 16:06:31 -0700 (PDT) From: John Stultz To: lkml Subject: [PATCH v5 01/25] drm: kirin: Fix for hikey620 display offset problem Date: Tue, 20 Aug 2019 23:06:02 +0000 Message-Id: <20190820230626.23253-2-john.stultz@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190820230626.23253-1-john.stultz@linaro.org> References: <20190820230626.23253-1-john.stultz@linaro.org> X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=q1UYVKf1UgYkHQbbceABIVFSdc5VY9rhqkw1qWPFE+g=; b=RJ0xYmr+le6e0PlBTw1zfPraNay7cF0OyB+nOHMyagiieh4nJXKPXaQvS3aMZyvjTO Dmk6dfoWGfWJkSpVdRwNjNYFsKpUZv/XyhMjb5cR/jkPe1xfhvU5GQb/mYk98XWCrRC/ hPu6nj+BMp2Yp5fK72qMJzbYwo/+3+MvQ0/3QmbQb7UvOVNhCwuys+knWVVbUj/WGzrq 5t+Z0pcOS3tIeJzDbdFTrjDoTkODIjDU1gC9ZudISnCQ7kbGGkZrDEswpYDtE30wx3tb Sd3hLENL8vNNiIh5S1hSRAhpRF/ZlPpW72Vs+AgHzTX5T6wwgAg08by4npeNAxrO3ZDu i6Sg== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Airlie , dri-devel , Xinliang Liu , Rongrong Zou , Da Lv , Yidong Lin , Sam Ravnborg MIME-Version: 1.0 Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Da Lv The original HiKey (620) board has had a long running issue where when using a 1080p montior, the display would occasionally blink and come come back with a horizontal offset (usually also shifting the colors, depending on the value of the offset%4). After lots of analysis by HiSi developers, they found the issue was due to when running at 1080p, it was possible to hit the device memory bandwidth limits, which could cause the DSI signal to get out of sync. Unfortunately the DSI logic doesn't have the ability to automatically recover from this situation, but we can get a an LDI underflow interrupt when it happens. To then correct the issue, when we get an LDI underflow irq, we we can simply suspend and resume the display, which resets the hardware. Thus, this patch enables the ldi underflow interrupt, and initializes a workqueue that is used to suspend/resume the display to recover. Then when the irq occurs we clear it and schedule the workqueue to reset display engine. Cc: Rongrong Zou Cc: Xinliang Liu Cc: David Airlie Cc: Daniel Vetter Cc: dri-devel Cc: Sam Ravnborg Acked-by: Xinliang Liu Reviewed-by: Sam Ravnborg Signed-off-by: Da Lv Signed-off-by: Yidong Lin [jstultz: Reworded the commit message, checkpatch cleanups] Signed-off-by: John Stultz --- v2: Minor cleanups v3: Rename workqueue entry for clarity (suggested by Sam) --- .../gpu/drm/hisilicon/kirin/kirin_ade_reg.h | 1 + .../gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 22 +++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h index e2ac09894a6d..0da860200410 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h @@ -83,6 +83,7 @@ #define VSIZE_OFST 20 #define LDI_INT_EN 0x741C #define FRAME_END_INT_EN_OFST 1 +#define UNDERFLOW_INT_EN_OFST 2 #define LDI_CTRL 0x7420 #define BPP_OFST 3 #define DATA_GATE_EN BIT(2) diff --git a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c index 0df1afdf319d..d972342527b8 100644 --- a/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c +++ b/drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c @@ -58,6 +58,7 @@ struct ade_hw_ctx { struct ade_crtc { struct drm_crtc base; struct ade_hw_ctx *ctx; + struct work_struct display_reset_wq; bool enable; u32 out_format; }; @@ -176,6 +177,7 @@ static void ade_init(struct ade_hw_ctx *ctx) */ ade_update_bits(base + ADE_CTRL, FRM_END_START_OFST, FRM_END_START_MASK, REG_EFFECTIVE_IN_ADEEN_FRMEND); + ade_update_bits(base + LDI_INT_EN, UNDERFLOW_INT_EN_OFST, MASK(1), 1); } static bool ade_crtc_mode_fixup(struct drm_crtc *crtc, @@ -345,6 +347,17 @@ static void ade_crtc_disable_vblank(struct drm_crtc *crtc) MASK(1), 0); } +static void drm_underflow_wq(struct work_struct *work) +{ + struct ade_crtc *acrtc = container_of(work, struct ade_crtc, + display_reset_wq); + struct drm_device *drm_dev = (&acrtc->base)->dev; + struct drm_atomic_state *state; + + state = drm_atomic_helper_suspend(drm_dev); + drm_atomic_helper_resume(drm_dev, state); +} + static irqreturn_t ade_irq_handler(int irq, void *data) { struct ade_crtc *acrtc = data; @@ -362,6 +375,12 @@ static irqreturn_t ade_irq_handler(int irq, void *data) MASK(1), 1); drm_crtc_handle_vblank(crtc); } + if (status & BIT(UNDERFLOW_INT_EN_OFST)) { + ade_update_bits(base + LDI_INT_CLR, UNDERFLOW_INT_EN_OFST, + MASK(1), 1); + DRM_ERROR("LDI underflow!"); + schedule_work(&acrtc->display_reset_wq); + } return IRQ_HANDLED; } @@ -1038,6 +1057,9 @@ static int ade_drm_init(struct platform_device *pdev) /* vblank irq init */ ret = devm_request_irq(dev->dev, ctx->irq, ade_irq_handler, IRQF_SHARED, dev->driver->name, acrtc); + + INIT_WORK(&acrtc->display_reset_wq, drm_underflow_wq); + if (ret) return ret;