Message ID | 20190821200129.11575-5-David.Francis@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Series |
Display Stream Compression (DSC) for AMD Navi
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expand
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diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c index 77ac7f707ec5..1189e320062b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc.c @@ -2127,7 +2127,7 @@ void dc_commit_updates_for_stream(struct dc *dc, enum surface_update_type update_type; struct dc_state *context; struct dc_context *dc_ctx = dc->ctx; - int i, j; + int i; stream_status = dc_stream_get_status(stream); context = dc->current_state; @@ -2165,16 +2165,6 @@ void dc_commit_updates_for_stream(struct dc *dc, copy_surface_update_to_plane(surface, &srf_updates[i]); - if (update_type >= UPDATE_TYPE_MED) { - for (j = 0; j < dc->res_pool->pipe_count; j++) { - struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; - - if (pipe_ctx->plane_state != surface) - continue; - - resource_build_scaling_params(pipe_ctx); - } - } } copy_stream_update_to_stream(dc, context, stream, stream_update);