@@ -357,6 +357,7 @@ static void drm_dp_link_caps_reset(struct drm_dp_link_caps *caps)
caps->enhanced_framing = false;
caps->tps3_supported = false;
caps->fast_training = false;
+ caps->channel_coding = false;
}
void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
@@ -365,6 +366,7 @@ void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
dest->enhanced_framing = src->enhanced_framing;
dest->tps3_supported = src->tps3_supported;
dest->fast_training = src->fast_training;
+ dest->channel_coding = src->channel_coding;
}
EXPORT_SYMBOL(drm_dp_link_caps_copy);
@@ -412,6 +414,7 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
link->caps.enhanced_framing = drm_dp_enhanced_frame_cap(values);
link->caps.tps3_supported = drm_dp_tps3_supported(values);
link->caps.fast_training = drm_dp_fast_training_cap(values);
+ link->caps.channel_coding = drm_dp_channel_coding_supported(values);
link->rate = link->max_rate;
link->lanes = link->max_lanes;
@@ -95,6 +95,7 @@
# define DP_DETAILED_CAP_INFO_AVAILABLE (1 << 4) /* DPI */
#define DP_MAIN_LINK_CHANNEL_CODING 0x006
+# define DP_CAP_ANSI_8B10B (1 << 0)
#define DP_DOWN_STREAM_PORT_COUNT 0x007
# define DP_PORT_COUNT_MASK 0x0f
@@ -1215,6 +1216,12 @@ drm_dp_sink_supports_fec(const u8 fec_capable)
return fec_capable & DP_FEC_CAPABLE;
}
+static inline bool
+drm_dp_channel_coding_supported(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ return dpcd[DP_MAIN_LINK_CHANNEL_CODING] & DP_CAP_ANSI_8B10B;
+}
+
/*
* DisplayPort AUX channel
*/
@@ -1371,11 +1378,13 @@ int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
* @enhanced_framing: enhanced framing capability (mandatory as of DP 1.2)
* @tps3_supported: training pattern sequence 3 supported for equalization
* @fast_training: AUX CH handshake not required for link training
+ * @channel_coding: ANSI 8B/10B channel coding capability
*/
struct drm_dp_link_caps {
bool enhanced_framing;
bool tps3_supported;
bool fast_training;
+ bool channel_coding;
};
void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,