From patchwork Tue Sep 10 09:24:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 11139103 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 35A1F76 for ; Tue, 10 Sep 2019 09:24:55 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1DB6B2084D for ; Tue, 10 Sep 2019 09:24:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1DB6B2084D Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1EB0789230; Tue, 10 Sep 2019 09:24:43 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) by gabe.freedesktop.org (Postfix) with ESMTPS id A64EE6E872; Tue, 10 Sep 2019 09:24:37 +0000 (UTC) Received: by mail-wr1-x443.google.com with SMTP id i1so18052787wro.4; Tue, 10 Sep 2019 02:24:37 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tLgkT21pWdsDr5xoWMRhdoXz4bz3uDgTEs1kfuIOGpo=; b=Exvm8rLBXUuDwZgO+Lb/qLRvwy82LOi3TO+bQN+y0kEt9NfjWwNhdDquQnn6ud84mM eZ2Gnz7Q8G1cbpswi/bh55ubX5p1M8Krga85w0lESGYaBJtJQ3Eu9k3Ht100Iul/jDbG aPz4iha97/tZhBce29eZ6pW++Cs3N5Ey6nRf0lv/yMMXVzAc+xHiblnjP6Wb/UVfABRK rQfhKuDFdJD2C4WdAs7588pqqAs0RtNKHkdYklkY3RVS/q7Dh5osrul6zOkwnRR2fl1D R4+KVt3+972QdIY3Jzycx3Q+rCOg8z2izmLbXKCwwlZ4ci/8fttPQeHsI/+yrm1HBW7e FiFw== X-Gm-Message-State: APjAAAV6/JQRxVavZ4bzFkElU7tipUMA8rNyc8nHvmR8JhnLGC8zMJ8X rTrPQlCJPemBi+Fga9QEBiMZtJZq X-Google-Smtp-Source: APXvYqyDdq0q5uYU1GoQJCYGNlzocoTn4wiZ4C3PXvW84TijVuqabWFth5mxJ+PawEHiuND8h7I4YQ== X-Received: by 2002:adf:fe4d:: with SMTP id m13mr20306218wrs.208.1568107476011; Tue, 10 Sep 2019 02:24:36 -0700 (PDT) Received: from abel.fritz.box ([2a02:908:1252:fb60:1cd:7d57:6942:ab1b]) by smtp.gmail.com with ESMTPSA id e12sm6107036wrw.37.2019.09.10.02.24.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Sep 2019 02:24:35 -0700 (PDT) From: " =?utf-8?q?Christian_K=C3=B6nig?= " X-Google-Original-From: =?utf-8?q?Christian_K=C3=B6nig?= To: amd-gfx@lists.freedesktop.org Subject: [PATCH 5/9] drm/amdgpu: allow direct submission of PTE updates Date: Tue, 10 Sep 2019 11:24:27 +0200 Message-Id: <20190910092431.37471-5-christian.koenig@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190910092431.37471-1-christian.koenig@amd.com> References: <20190910092431.37471-1-christian.koenig@amd.com> MIME-Version: 1.0 X-Mailman-Original-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tLgkT21pWdsDr5xoWMRhdoXz4bz3uDgTEs1kfuIOGpo=; b=t158gh7LHcmJ15dB//dqSE/l88iSCXQM/blAu2zzsmVlUCtWXs3W+l5xHGQ3tAizO7 FfbiEjPLmE+s8o6P3nXN1EW9a9zRHR0cUGnu3AT7VWsTdRiEflJepa+nh5m/9tpu79Tr hELPP2qts6wYwTbpW9tquP4mmDiLWeiJILFkKCeeVgOZLoVnEtbXRU0dTEi3gqECLbke izzxBPUeRcTa4uCWhDXPST5e9DDdHImiYm5ReUn/SUexnePqZXOi83sM0X51MdR/DZnX BFXwX8D1X3InAYMrVcQqpcSdW/YOm/t6Q14vF9cxm1pRVB8OHftAq2pZ+5JWjNt1hph6 MF6Q== X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dri-devel@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" For handling PTE updates directly in the fault handler. Signed-off-by: Christian König Reviewed-by: Felix Kuehling --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index fff553a591b6..aed68fa88f16 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c @@ -1492,13 +1492,14 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params, * amdgpu_vm_bo_update_mapping - update a mapping in the vm page table * * @adev: amdgpu_device pointer - * @exclusive: fence we need to sync to - * @pages_addr: DMA addresses to use for mapping * @vm: requested vm + * @direct: direct submission in a page fault + * @exclusive: fence we need to sync to * @start: start of mapped range * @last: last mapped entry * @flags: flags for the entries * @addr: addr to set the area to + * @pages_addr: DMA addresses to use for mapping * @fence: optional resulting fence * * Fill in the page table entries between @start and @last. @@ -1507,11 +1508,11 @@ static int amdgpu_vm_update_ptes(struct amdgpu_vm_update_params *params, * 0 for success, -EINVAL for failure. */ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, + struct amdgpu_vm *vm, bool direct, struct dma_fence *exclusive, - dma_addr_t *pages_addr, - struct amdgpu_vm *vm, uint64_t start, uint64_t last, uint64_t flags, uint64_t addr, + dma_addr_t *pages_addr, struct dma_fence **fence) { struct amdgpu_vm_update_params params; @@ -1521,6 +1522,7 @@ static int amdgpu_vm_bo_update_mapping(struct amdgpu_device *adev, memset(¶ms, 0, sizeof(params)); params.adev = adev; params.vm = vm; + params.direct = direct; params.pages_addr = pages_addr; /* sync to everything except eviction fences on unmapping */ @@ -1633,9 +1635,9 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev, } last = min((uint64_t)mapping->last, start + max_entries - 1); - r = amdgpu_vm_bo_update_mapping(adev, exclusive, dma_addr, vm, + r = amdgpu_vm_bo_update_mapping(adev, vm, false, exclusive, start, last, flags, addr, - fence); + dma_addr, fence); if (r) return r; @@ -1929,9 +1931,9 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev, mapping->start < AMDGPU_GMC_HOLE_START) init_pte_value = AMDGPU_PTE_DEFAULT_ATC; - r = amdgpu_vm_bo_update_mapping(adev, NULL, NULL, vm, + r = amdgpu_vm_bo_update_mapping(adev, vm, false, NULL, mapping->start, mapping->last, - init_pte_value, 0, &f); + init_pte_value, 0, NULL, &f); amdgpu_vm_free_mapping(adev, vm, mapping, f); if (r) { dma_fence_put(f);