@@ -3,7 +3,7 @@ Binding for an external clock signal driven by a PWM pin.
This binding uses the common clock binding[1] and the common PWM binding[2].
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-[2] Documentation/devicetree/bindings/pwm/pwm.txt
+[2] Documentation/devicetree/bindings/pwm/pwm-consumers.yaml
Required properties:
- compatible : shall be "pwm-clock".
@@ -21,7 +21,7 @@ Optional properties:
- #gpio-cells : Should be two. The first cell is the pin number and
the second cell is used to specify flags.
See ../../gpio/gpio.txt for more information.
-- #pwm-cells : Should be one. See ../../pwm/pwm.txt for description of
+- #pwm-cells : Should be one. See ../../pwm/pwm.yaml for description of
the cell formats.
- clock-names: should be "refclk"
@@ -37,7 +37,7 @@ Optional properties:
- solomon,area-color-enable: Display uses color mode
- solomon,low-power. Display runs in low power mode
-[0]: Documentation/devicetree/bindings/pwm/pwm.txt
+[0]: Documentation/devicetree/bindings/pwm/pwm-consumers.yaml
Examples:
ssd1307: oled@3c {
@@ -28,7 +28,7 @@ Optional properties:
having to list out every possible value in the
brightness-level array.
-[0]: Documentation/devicetree/bindings/pwm/pwm.txt
+[0]: Documentation/devicetree/bindings/pwm/pwm-consumers.yaml
[1]: Documentation/devicetree/bindings/gpio/gpio.txt
Example:
@@ -11,7 +11,7 @@ LED sub-node properties:
specify the period time to be used: <&phandle id period_ns>;
- pwm-names : (optional) Name to be used by the PWM subsystem for the PWM device
For the pwms and pwm-names property please refer to:
- Documentation/devicetree/bindings/pwm/pwm.txt
+ Documentation/devicetree/bindings/pwm/pwm-consumers.yaml
- max-brightness : Maximum brightness possible for the LED
- active-low : (optional) For PWMs where the LED is wired to supply
rather than ground.
@@ -38,7 +38,7 @@ Optional properties:
PWM properties should be named "pwms". And number of cell is different
for each pwm device.
To get more information, please refer to documentation.
- [*] refer Documentation/devicetree/bindings/pwm/pwm.txt
+ [*] refer Documentation/devicetree/bindings/pwm/pwm-consumers.yaml
- charger : Node configuring the charger driver.
If present, required properties:
@@ -10,7 +10,7 @@ Required properties:
- pinctrl-0: should contain the pinctrl states described by pinctrl
default.
- #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
- bindings defined in pwm.txt in this directory.
+ bindings defined in pwm.yaml in this directory.
Example:
@@ -7,7 +7,7 @@ Required properties:
- "atmel,sama5d2-pwm"
- "microchip,sam9x60-pwm"
- reg: physical base address and length of the controller's registers
- - #pwm-cells: Should be 3. See pwm.txt in this directory for a
+ - #pwm-cells: Should be 3. See pwm.yaml in this directory for a
description of the cells format.
Example:
@@ -2,7 +2,7 @@ Atmel TCB PWM controller
Required properties:
- compatible: should be "atmel,tcb-pwm"
-- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
- tc-block: The Timer Counter block to use as a PWM chip.
@@ -4,7 +4,7 @@ Required properties:
- compatible: must be "brcm,bcm7038-pwm"
- reg: physical base address and length for this controller
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description
of the cells format
- clocks: a phandle to the reference clock for this block which is fed through
its internal variable clock frequency generator
@@ -6,7 +6,7 @@ Required Properties :
- compatible: must be "brcm,iproc-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle + clock specifier pair for the external clock
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a
description of the cells format.
Refer to clocks/clock-bindings.txt for generic clock consumer properties.
@@ -6,7 +6,7 @@ Required Properties :
- compatible: should contain "brcm,kona-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle + clock specifier pair for the external clock
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a
description of the cells format.
Refer to clocks/clock-bindings.txt for generic clock consumer properties.
@@ -8,7 +8,7 @@ Required properties:
- clock-names: Must include the following entries.
- pwm: PWM operating clock.
- sys: PWM system interface clock.
- - #pwm-cells: Should be 2. See pwm.txt in this directory for the
+ - #pwm-cells: Should be 2. See pwm.yaml in this directory for the
description of the cells format.
- img,cr-periph: Must contain a phandle to the peripheral control
syscon node which contains PWM control registers.
@@ -6,7 +6,7 @@ Required properties:
- "fsl,imx1-pwm" for PWM compatible with the one integrated on i.MX1
- "fsl,imx27-pwm" for PWM compatible with the one integrated on i.MX27
- reg: physical base address and length of the controller's registers
-- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.txt
+- #pwm-cells: 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
in this directory for a description of the cells format.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
@@ -3,7 +3,7 @@ Freescale i.MX TPM PWM controller
Required properties:
- compatible : Should be "fsl,imx7ulp-pwm".
- reg: Physical base address and length of the controller's registers.
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of the cells format.
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of the cells format.
- clocks : The clock provided by the SoC to drive the PWM.
- interrupts: The interrupt for the PWM controller.
@@ -7,7 +7,7 @@ Required properties:
See ../clock/clock-bindings.txt for details.
- clock-names: Must include the following entries.
- pwm: PWM operating clock.
- - #pwm-cells: Should be 3. See pwm.txt in this directory for the description
+ - #pwm-cells: Should be 3. See pwm.yaml in this directory for the description
of the cells format.
Example:
@@ -3,7 +3,7 @@ Freescale MXS PWM controller
Required properties:
- compatible: should be "fsl,imx23-pwm"
- reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
- fsl,pwm-number: the number of PWM devices
@@ -10,7 +10,7 @@ Required properties:
- "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
- "nvidia,tegra186-pwm": for Tegra186
- reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
- clocks: Must contain one entry, for the module clock.
See ../clocks/clock-bindings.txt for details.
@@ -3,7 +3,7 @@ NXP PCA9685 16-channel 12-bit PWM LED controller
Required properties:
- compatible: "nxp,pca9685-pwm"
- - #pwm-cells: Should be 2. See pwm.txt in this directory for a description of
+ - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
the cells format.
The index 16 is the ALLCALL channel, that sets all PWM channels at the same
time.
@@ -6,7 +6,7 @@ Required properties:
- clocks: This clock defines the base clock frequency of the PWM hardware
system, the period and the duty_cycle of the PWM signal is a multiple of
the base period.
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Examples:
@@ -4,7 +4,7 @@ Required properties:
- compatible: should be "marvell,berlin-pwm"
- reg: physical base address and length of the controller's registers
- clocks: phandle to the input clock
-- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:
new file mode 100644
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm-consumers.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Specifying PWM information for devices
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+
+description: |
+ PWM properties should be named "pwms". The exact meaning of each pwms
+ property must be documented in the device tree binding for each device.
+ An optional property "pwm-names" may contain a list of strings to label
+ each of the PWM devices listed in the "pwms" property. If no "pwm-names"
+ property is given, the name of the user node will be used as fallback.
+
+ Drivers for devices that use more than a single PWM device can use the
+ "pwm-names" property to map the name of the PWM device requested by the
+ pwm_get() call to an index into the list given by the "pwms" property.
+
+properties:
+ pwms:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ description: |
+ Phandle to PWM controller node and pwm-specifier (controller specific).
+ pwm-specifier typically encodes the chip-relative PWM number and the PWM
+ period in nanoseconds.
+ Optionally, the pwm-specifier can encode a number of flags (defined in
+ <dt-bindings/pwm/pwm.h>) in a third cell:
+ - PWM_POLARITY_INVERTED: invert the PWM signal polarity
+
+ pwm-names:
+ $ref: /schemas/types.yaml#/definitions/string-array
+ description:
+ A list of strings to label each of the PWM devices listed in the "pwms"
+ property. If no "pwm-names" property is given, the name of the user node
+ will be used as fallback.
+
+required:
+ - pwms
+
+dependencies:
+ pwm-names: [ pwms ]
+
+examples:
+ - |
+ // The following example could be used to describe a PWM-based
+ // backlight device:
+
+ pwm: pwm {
+ #pwm-cells = <2>;
+ };
+
+ bl: backlight {
+ pwms = <&pwm 0 5000000>;
+ pwm-names = "backlight";
+ };
+
+ // Note that in the example above, specifying the "pwm-names" is redundant
+ // because the name "backlight" would be used as fallback anyway.
+
+ - |
+ // Example with optional PWM specifier for inverse polarity
+
+ #include <dt-bindings/pwm/pwm.h>
+
+ pwm2: pwm {
+ #pwm-cells = <3>;
+ };
+
+ backlight {
+ pwms = <&pwm2 0 5000000 PWM_POLARITY_INVERTED>;
+ pwm-names = "backlight";
+ };
@@ -21,7 +21,7 @@ Required properties:
- "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610
- "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM
- reg: Physical base address and length of the controller's registers
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
- clock-names: Should include the following module clock source entries:
"ftm_sys" (module clock, also can be used as counter clock),
@@ -10,7 +10,7 @@ Required properties:
- reg: physical base address and length of the controller's registers.
- clocks: phandle and clock specifier of the PWM reference clock.
- resets: phandle and reset specifier for the PWM controller reset.
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:
@@ -2,7 +2,7 @@ TI/National Semiconductor LP3943 PWM controller
Required properties:
- compatible: "ti,lp3943-pwm"
- - #pwm-cells: Should be 2. See pwm.txt in this directory for a
+ - #pwm-cells: Should be 2. See pwm.yaml in this directory for a
description of the cells format.
Note that this hardware limits the period length to the
range 6250~1600000.
@@ -7,7 +7,7 @@ Required properties:
- "mediatek,mt7623-pwm": found on mt7623 SoC.
- "mediatek,mt7628-pwm": found on mt7628 SoC.
- reg: physical base address and length of the controller's registers.
- - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
+ - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
the cell format.
- clocks: phandle and clock specifier of the PWM reference clock.
- clock-names: must contain the following, except for MT7628 which
@@ -10,7 +10,7 @@ Required properties:
or "amlogic,meson-g12a-ee-pwm"
or "amlogic,meson-g12a-ao-pwm-ab"
or "amlogic,meson-g12a-ao-pwm-cd"
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Optional properties:
@@ -6,7 +6,7 @@ Required properties:
- "mediatek,mt6595-disp-pwm": found on mt6595 SoC.
- "mediatek,mt8173-disp-pwm": found on mt8173 SoC.
- reg: physical base address and length of the controller's registers.
- - #pwm-cells: must be 2. See pwm.txt in this directory for a description of
+ - #pwm-cells: must be 2. See pwm.yaml in this directory for a description of
the cell format.
- clocks: phandle and clock specifier of the PWM reference clock.
- clock-names: must contain the following:
@@ -4,7 +4,7 @@ Required properties:
- compatible: Shall contain "ti,omap-dmtimer-pwm".
- ti,timers: phandle to PWM capable OMAP timer. See timer/ti,timer.txt for info
about these timers.
-- #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Optional properties:
@@ -14,7 +14,7 @@ Required properties:
- For newer hardware (rk3328 and future socs): specified by name
- "pwm": This is used to derive the functional clock.
- "pclk": This is the APB bus clock.
- - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.txt in this directory
+ - #pwm-cells: must be 2 (rk2928) or 3 (rk3288). See pwm.yaml in this directory
for a description of the cell format.
Example:
@@ -17,7 +17,7 @@ Required properties:
Please refer to sifive-blocks-ip-versioning.txt for details.
- reg: physical base address and length of the controller's registers
- clocks: Should contain a clock identifier for the PWM's parent clock.
-- #pwm-cells: Should be 3. See pwm.txt in this directory
+- #pwm-cells: Should be 3. See pwm.yaml in this directory
for a description of the cell format.
- interrupts: one interrupt per PWM channel
@@ -8,7 +8,7 @@ See ../mfd/stm32-lptimer.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm-lp".
- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
- bindings defined in pwm.txt.
+ bindings defined in pwm.yaml.
Optional properties:
- pinctrl-names: Set to "default". An additional "sleep" state can be
@@ -9,7 +9,7 @@ Required parameters:
- pinctrl-0: List of phandles pointing to pin configuration nodes for PWM module.
For Pinctrl properties see ../pinctrl/pinctrl-bindings.txt
- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
- bindings defined in pwm.txt.
+ bindings defined in pwm.yaml.
Optional parameters:
- st,breakinput: One or two <index level filter> to describe break input configurations.
@@ -8,7 +8,7 @@ Required properties:
for dra746 - compatible = "ti,dra746-ecap", "ti,am3352-ecap";
for 66ak2g - compatible = "ti,k2g-ecap", "ti,am3352-ecap";
for am654 - compatible = "ti,am654-ecap", "ti,am3352-ecap";
-- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The PWM channel index ranges from 0 to 4. The only third
cell flag supported by this binding is PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.
@@ -7,7 +7,7 @@ Required properties:
for am654 - compatible = "ti,am654-ehrpwm", "ti-am3352-ehrpwm";
for da850 - compatible = "ti,da850-ehrpwm", "ti-am3352-ehrpwm", "ti,am33xx-ehrpwm";
for dra746 - compatible = "ti,dra746-ehrpwm", "ti-am3352-ehrpwm";
-- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
- reg: physical base address and size of the registers map.
@@ -7,7 +7,7 @@ Required properties:
- clock-names: "pclk" for PCLK, "wclk" for WCLK to the PWM controller. The
PCLK is for register access, while WCLK is the reference clock for
calculating period and duty cycles.
- - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+ - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
the cells format.
Example:
deleted file mode 100644
@@ -1,69 +0,0 @@
-Specifying PWM information for devices
-======================================
-
-1) PWM user nodes
------------------
-
-PWM users should specify a list of PWM devices that they want to use
-with a property containing a 'pwm-list':
-
- pwm-list ::= <single-pwm> [pwm-list]
- single-pwm ::= <pwm-phandle> <pwm-specifier>
- pwm-phandle : phandle to PWM controller node
- pwm-specifier : array of #pwm-cells specifying the given PWM
- (controller specific)
-
-PWM properties should be named "pwms". The exact meaning of each pwms
-property must be documented in the device tree binding for each device.
-An optional property "pwm-names" may contain a list of strings to label
-each of the PWM devices listed in the "pwms" property. If no "pwm-names"
-property is given, the name of the user node will be used as fallback.
-
-Drivers for devices that use more than a single PWM device can use the
-"pwm-names" property to map the name of the PWM device requested by the
-pwm_get() call to an index into the list given by the "pwms" property.
-
-The following example could be used to describe a PWM-based backlight
-device:
-
- pwm: pwm {
- #pwm-cells = <2>;
- };
-
- [...]
-
- bl: backlight {
- pwms = <&pwm 0 5000000>;
- pwm-names = "backlight";
- };
-
-Note that in the example above, specifying the "pwm-names" is redundant
-because the name "backlight" would be used as fallback anyway.
-
-pwm-specifier typically encodes the chip-relative PWM number and the PWM
-period in nanoseconds.
-
-Optionally, the pwm-specifier can encode a number of flags (defined in
-<dt-bindings/pwm/pwm.h>) in a third cell:
-- PWM_POLARITY_INVERTED: invert the PWM signal polarity
-
-Example with optional PWM specifier for inverse polarity
-
- bl: backlight {
- pwms = <&pwm 0 5000000 PWM_POLARITY_INVERTED>;
- pwm-names = "backlight";
- };
-
-2) PWM controller nodes
------------------------
-
-PWM controller nodes must specify the number of cells used for the
-specifier using the '#pwm-cells' property.
-
-An example PWM controller might look like this:
-
- pwm: pwm@7000a000 {
- compatible = "nvidia,tegra20-pwm";
- reg = <0x7000a000 0x100>;
- #pwm-cells = <2>;
- };
new file mode 100644
@@ -0,0 +1,29 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: PWM controllers (providers)
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+
+properties:
+ $nodename:
+ pattern: "^pwm(@.*|-[0-9a-f])*$"
+
+ "#pwm-cells":
+ description:
+ Number of cells in a PWM specifier.
+
+required:
+ - "#pwm-cells"
+
+examples:
+ - |
+ pwm: pwm@7000a000 {
+ compatible = "nvidia,tegra20-pwm";
+ reg = <0x7000a000 0x100>;
+ #pwm-cells = <2>;
+ };
@@ -20,7 +20,7 @@ Required Properties:
- "renesas,pwm-r8a77990": for R-Car E3
- "renesas,pwm-r8a77995": for R-Car D3
- reg: base address and length of the registers block for the PWM.
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
- clocks: clock phandle and specifier pair.
- pinctrl-0: phandle, referring to a default pin configuration node.
@@ -19,11 +19,11 @@ Required Properties:
- reg: Base address and length of each memory resource used by the PWM
controller hardware module.
- - #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+ - #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
-Please refer to pwm.txt in this directory for details of the common PWM bindings
+Please refer to pwm-consumers.yaml in this directory for details of the common PWM bindings
used by client devices.
Example: R8A7740 (R-Mobile A1) TPU controller node
@@ -5,7 +5,7 @@ Required properties:
- "st,spear320-pwm"
- "st,spear1340-pwm"
- reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:
@@ -7,7 +7,7 @@ subdevices of the STMPE MFD device.
Required properties:
- compatible: should be:
- "st,stmpe-pwm"
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:
@@ -6,7 +6,7 @@ On TWL6030 series: PWM0 and PWM1
Required properties:
- compatible: "ti,twl4030-pwm" or "ti,twl6030-pwm"
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:
@@ -6,7 +6,7 @@ On TWL6030 series: LED PWM (mainly used as charging indicator LED)
Required properties:
- compatible: "ti,twl4030-pwmled" or "ti,twl6030-pwmled"
-- #pwm-cells: should be 2. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 2. See pwm.yaml in this directory for a description of
the cells format.
Example:
@@ -3,7 +3,7 @@ VIA/Wondermedia VT8500/WM8xxx series SoC PWM controller
Required properties:
- compatible: should be "via,vt8500-pwm"
- reg: physical base address and length of the controller's registers
-- #pwm-cells: should be 3. See pwm.txt in this directory for a description of
+- #pwm-cells: should be 3. See pwm.yaml in this directory for a description of
the cells format. The only third cell flag supported by this binding is
PWM_POLARITY_INVERTED.
- clocks: phandle to the PWM source clock
@@ -27,7 +27,7 @@ Required properties:
--------------------
- compatible: Should be "pwm-regulator"
-- pwms: PWM specification (See: ../pwm/pwm.txt)
+- pwms: PWM specification (See: ../pwm/pwm-consumers.yaml)
Only required for Voltage Table Mode:
- voltage-table: Voltage and Duty-Cycle table consisting of 2 cells
@@ -42,7 +42,7 @@ Required properties:
- compatible: Must be one of:
* ingenic,jz4740-pwm
* ingenic,jz4725b-pwm
-- #pwm-cells: Should be 3. See ../pwm/pwm.txt for a description of the cell
+- #pwm-cells: Should be 3. See ../pwm/pwm.yaml for a description of the cell
format.
- clocks: List of phandle & clock specifiers for the TCU clocks.
- clock-names: List of name strings for the TCU clocks.
Convert generic PWM bindings to DT schema format using json-schema. The consumer bindings are split to separate file. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> --- Changes since v1: 1. Indent example with four spaces (more readable), 2. Change pattern for pwm nodes, 3. Remove $ref from #cells. --- .../devicetree/bindings/clock/pwm-clock.txt | 2 +- .../bindings/display/bridge/ti,sn65dsi86.txt | 2 +- .../devicetree/bindings/display/ssd1307fb.txt | 2 +- .../bindings/leds/backlight/pwm-backlight.txt | 2 +- .../devicetree/bindings/leds/leds-pwm.txt | 2 +- .../devicetree/bindings/mfd/max77693.txt | 2 +- .../bindings/pwm/atmel-hlcdc-pwm.txt | 2 +- .../devicetree/bindings/pwm/atmel-pwm.txt | 2 +- .../devicetree/bindings/pwm/atmel-tcb-pwm.txt | 2 +- .../bindings/pwm/brcm,bcm7038-pwm.txt | 2 +- .../bindings/pwm/brcm,iproc-pwm.txt | 2 +- .../devicetree/bindings/pwm/brcm,kona-pwm.txt | 2 +- .../devicetree/bindings/pwm/img-pwm.txt | 2 +- .../devicetree/bindings/pwm/imx-pwm.txt | 2 +- .../devicetree/bindings/pwm/imx-tpm-pwm.txt | 2 +- .../bindings/pwm/lpc1850-sct-pwm.txt | 2 +- .../devicetree/bindings/pwm/mxs-pwm.txt | 2 +- .../bindings/pwm/nvidia,tegra20-pwm.txt | 2 +- .../bindings/pwm/nxp,pca9685-pwm.txt | 2 +- .../devicetree/bindings/pwm/pwm-bcm2835.txt | 2 +- .../devicetree/bindings/pwm/pwm-berlin.txt | 2 +- .../bindings/pwm/pwm-consumers.yaml | 76 +++++++++++++++++++ .../devicetree/bindings/pwm/pwm-fsl-ftm.txt | 2 +- .../devicetree/bindings/pwm/pwm-hibvt.txt | 2 +- .../devicetree/bindings/pwm/pwm-lp3943.txt | 2 +- .../devicetree/bindings/pwm/pwm-mediatek.txt | 2 +- .../devicetree/bindings/pwm/pwm-meson.txt | 2 +- .../devicetree/bindings/pwm/pwm-mtk-disp.txt | 2 +- .../bindings/pwm/pwm-omap-dmtimer.txt | 2 +- .../devicetree/bindings/pwm/pwm-rockchip.txt | 2 +- .../devicetree/bindings/pwm/pwm-sifive.txt | 2 +- .../devicetree/bindings/pwm/pwm-stm32-lp.txt | 2 +- .../devicetree/bindings/pwm/pwm-stm32.txt | 2 +- .../devicetree/bindings/pwm/pwm-tiecap.txt | 2 +- .../devicetree/bindings/pwm/pwm-tiehrpwm.txt | 2 +- .../devicetree/bindings/pwm/pwm-zx.txt | 2 +- Documentation/devicetree/bindings/pwm/pwm.txt | 69 ----------------- .../devicetree/bindings/pwm/pwm.yaml | 29 +++++++ .../bindings/pwm/renesas,pwm-rcar.txt | 2 +- .../bindings/pwm/renesas,tpu-pwm.txt | 4 +- .../devicetree/bindings/pwm/spear-pwm.txt | 2 +- .../devicetree/bindings/pwm/st,stmpe-pwm.txt | 2 +- .../devicetree/bindings/pwm/ti,twl-pwm.txt | 2 +- .../devicetree/bindings/pwm/ti,twl-pwmled.txt | 2 +- .../devicetree/bindings/pwm/vt8500-pwm.txt | 2 +- .../bindings/regulator/pwm-regulator.txt | 2 +- .../devicetree/bindings/timer/ingenic,tcu.txt | 2 +- 47 files changed, 150 insertions(+), 114 deletions(-) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-consumers.yaml delete mode 100644 Documentation/devicetree/bindings/pwm/pwm.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm.yaml